PIC24FV16KA304T-I/ML Microchip Technology, PIC24FV16KA304T-I/ML Datasheet - Page 163

• Manufacturer Part Number: PIC24FV16KA304T-I/ML
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 44 QFN 8x8x0.9mm
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV16KA304T-I/ML

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 16KB (5.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 15-2:
 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
Note 1:
OCTRIG
FLTMD
R/W-0
R/W-0
2:
3:
Do not use an OC module as its own trigger source, either by selecting this mode or another equivalent
SYNCSEL setting.
Use these inputs as trigger sources only and never as sync sources.
These bits affect the rising edge when OCINV = 1. The bits have no effect when the OCM bits
(OCxCON1<2:0>) = 001.
FLTMD: Fault Mode Select bit
1 = Fault mode is maintained until the Fault source is removed and the corresponding OCFLT0 bit is
0 = Fault mode is maintained until the Fault source is removed and a new PWM period starts
FLTOUT: Fault Out bit
1 = PWM output is driven high on a Fault
0 = PWM output is driven low on a Fault
FLTTRIEN: Fault Output State Select bit
1 = Pin is forced to an output on a Fault condition
0 = Pin I/O condition is unaffected by a Fault
OCINV: OCMP Invert bit
1 = OCx output is inverted
0 = OCx output is not inverted
Unimplemented: Read as ‘0’
DCB<1:0>: OC Pulse-Width Least Significant bits
11 = Delay OCx falling edge by 3/4 of the instruction cycle
10 = Delay OCx falling edge by 1/2 of the instruction cycle
01 = Delay OCx falling edge by 1/4 of the instruction cycle
00 = OCx falling edge occurs at start of the instruction cycle
OC32: Cascade Two OC Modules Enable bit (32-bit operation)
1 = Cascade module operation is enabled
0 = Cascade module operation is disabled
OCTRIG: OCx Trigger/Sync Select bit
1 = Trigger OCx from source designated by SYNCSELx bits
0 = Synchronize OCx with source designated by SYNCSELx bits
TRIGSTAT: Timer Trigger Status bit
1 = Timer source has been triggered and is running
0 = Timer source has not been triggered and is being held clear
OCTRIS: OCx Output Pin Direction Select bit
1 = OCx pin is tri-stated
0 = Output compare peripheral x is connected to the OCx pin
R/W-0, HS
TRIGSTAT
FLTOUT
R/W-0
cleared in software
OCxCON2: OUTPUT COMPARE x CONTROL REGISTER 2
HS = Hardware Settable bit
W = Writable bit
‘1’ = Bit is set
FLTTRIEN
OCTRIS
R/W-0
R/W-0
SYNCSEL4
OCINV
R/W-0
R/W-0
PIC24FV32KA304 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SYNCSEL3
R/W-1
U-0
—
(3)
SYNCSEL2
DCB1
R/W-0
R/W-1
(3)
x = Bit is unknown
SYNCSEL1
DCB0
R/W-0
R/W-0
(3)
DS39995B-page 163
SYNCSEL0
R/W-0
R/W-0
OC32
bit 8
bit 0