PIC32MX664F064HT-I/PT Microchip Technology, PIC32MX664F064HT-I/PT Datasheet - Page 95

64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, Ethernet, 4 DMA 64 TQFP 10x10x1mm T/

PIC32MX664F064HT-I/PT

Manufacturer Part Number
PIC32MX664F064HT-I/PT
Description
64 PINS, 64KB Flash, 32KB RAM, 80 MHz, USB, Ethernet, 4 DMA 64 TQFP 10x10x1mm T/
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX664F064HT-I/PT

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Processor Series
PIC32MX5x
Core
MIPS32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX664F064HT-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 4-30:
TABLE 4-31:
Legend:
Note
Legend:
Note
6100
6110
6120
6130
6100
6120
6130
6110
1:
1:
PORTE
PORTE
TRISE
ODCE
TRISE
ODCE
LATE
LATE
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTE REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H,
PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H,
PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES
PORTE REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L,
PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L,
PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES
31/15
31/15
30/14
30/14
29/13
29/13
28/12
28/12
27/11
27/11
26/10
26/10
TRISE9
ODCE9
LATE9
25/9
25/9
RE9
TRISE8
ODCE8
LATE8
24/8
24/8
RE8
Bits
Bits
TRISE7
ODCE7
TRISE7
ODCE7
LATE7
LATE7
23/7
23/7
RE7
RE7
TRISE6
TRISE6
0DCE6
0DCE6
LATE6
LATE6
22/6
22/6
RE6
RE6
(1)
TRISE5
ODCE5
TRISE5
ODCE5
LATE5
LATE5
21/5
21/5
RE5
RE5
TRISE4
TRISE4
ODCE4
ODCE4
LATE4
LATE4
20/4
20/4
RE4
RE4
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
TRISE3
ODCE3
TRISE3
ODCE3
LATE3
LATE3
19/3
19/3
RE3
RE3
(1)
TRISE2
TRISE2
ODCE2
ODCE2
LATE2
LATE2
18/2
18/2
RE2
RE2
TRISE1
ODCE1
TRISE1
ODCE1
LATE1
LATE1
17/1
17/1
RE1
RE1
TRISE0
ODCE0
TRISE0
ODCE0
LATE0
LATE0
16/0
16/0
RE0
RE0
for more
for more
0000
03FF
0000
xxxx
0000
xxxx
0000
0000
0000
00FF
0000
xxxx
0000
xxxx
0000
0000

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