S29GL128P90TFIR13 Spansion Inc., S29GL128P90TFIR13 Datasheet - Page 12

• Manufacturer Part Number: S29GL128P90TFIR13
• Description: IC 128M PAGE-MODE FLASH MEMORY
• Manufacturer: Spansion Inc.

Specifications of S29GL128P90TFIR13

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 24/23Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 16M/8M
• Supply Current: 110mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Compliant

3. Block Diagram
4. Physical Dimensions/Connection Diagrams
4.1
4.2
12
** A
A
Max
WP#/ACC
Max
RESET#
**–A0 (A-1)
BYTE#
GL01GP=A25, A
WE#
OE#
V
CE#
V
V
CC
SS
IO
Related Documents
Special Handling Instructions for BGA Package
This section shows the I/O designations and package specifications for the S29GL-P family.
The following documents contain information relating to the S29GL-P devices. Click on the title or go to
www.spansion.com
 Considerations for X-ray Inspection of Surface-Mounted Flash Integrated Circuits
Special handling is required for Flash Memory products in BGA packages.
Flash memory devices in BGA packages may be damaged if exposed to ultrasonic cleaning methods. The
package and/or data integrity may be compromised if the package body is exposed to temperatures above
150°C for prolonged periods of time.
Max
RY/BY#
V
CC
Command
GL512P = A24, A
Register
Control
State
Detector
Max
download the PDF file, or request a copy from your sales office.
GL256P = A23, A
PGM Voltage
Generator
Figure 3.1 S29GL-P Block Diagram
Timer
S29GL-P MirrorBit
Max
Sector Switches
GL128P = A22
Erase Voltage
Generator
D a t a
STB
®
Flash Family
Output Enable
Chip Enable
S h e e t
Logic
Y-Decoder
X-Decoder
S29GL-P_00_A13 November 17, 2010
STB
DQ15
Input/Output
Buffers
Cell Matrix
Y-Gating
Latch
Data
–
DQ0