Flash 3V 1 Gb Mirrorbit highest address120ns

S29GL01GP12TFI010

Manufacturer Part NumberS29GL01GP12TFI010
DescriptionFlash 3V 1 Gb Mirrorbit highest address120ns
ManufacturerSpansion Inc.
S29GL01GP12TFI010 datasheet
 


Specifications of S29GL01GP12TFI010

Memory TypeNORMemory Size1 Gbit
Access Time110 nsData Bus Width8 bit, 16 bit
ArchitectureUniformInterface TypePage-mode
Supply Voltage (max)3.6 VSupply Voltage (min)2.7 V
Maximum Operating Current50 mAMounting StyleSMD/SMT
Operating Temperature+ 85 CPackage / CaseTSOP-56
Memory Configuration128K X 16Ic Interface TypeParallel
Supply Voltage Range2.7V To 3.6VMemory Case StyleBGA
No. Of Pins56Lead Free Status / RoHS StatusLead free / RoHS Compliant
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S29GL-P MirrorBit
S29GL01GP, S29GL512P, S29GL256P, S29GL128P
1 Gigabit, 512 Megabit, 256 Megabit and 128 Megabit
3.0 Volt-only Page Mode Flash Memory featuring
90 nm MirrorBit Process Technology
Data Sheet (Preliminary)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. The Preliminary status of this document indicates that product qualification has
been completed, and that initial production has begun. Due to the phases of the manufacturing process that
require maintaining efficiency and quality, this document may be revised by subsequent versions or
modifications due to changes in technical specifications.
Publication Number S29GL-P_00
®
Flash Family
Revision A
Amendment 8
S29GL-P MirrorBit
®
Flash Family Cover Sheet
Issue Date November 28, 2007

S29GL01GP12TFI010 Summary of contents

  • Page 1

    ... S29GL-P MirrorBit S29GL01GP, S29GL512P, S29GL256P, S29GL128P 1 Gigabit, 512 Megabit, 256 Megabit and 128 Megabit 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology Data Sheet (Preliminary) Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qualification has been completed, and that initial production has begun ...

  • Page 2

    ... Spansion Inc. The information is intended to help you evaluate this product. Do not design in this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.” ...

  • Page 3

    ... S29GL-P MirrorBit S29GL01GP, S29GL512P, S29GL256P, S29GL128P 1 Gigabit, 512 Megabit, 256 Megabit and 128 Megabit 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology Data Sheet (Preliminary) General Description The Spansion S29GL01G/512/256/128P are Mirrorbit offer a fast page access time with a corresponding random access time as fast as 90 ns. They feature a Write Buffer that allows a maximum of 32 words/64 bytes to be programmed in one operation, resulting in faster effective programming time than standard programming algorithms. This makes these devices ideal for today’ ...

  • Page 4

    Performance Characteristics Density Voltage Range Regulated V 128 & 256 Mb VersatileIO V Regulated V 512 Mb VersatileIO V Regulated VersatileIO V Notes 1. Access times are dependent on V See Ordering Information Regulated ...

  • Page 5

    ... Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9.2 Automatic Sleep Mode 9.3 Hardware RESET# Input Operation 9.4 Output Disable (OE#). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 10. Secured Silicon Sector Flash Memory Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 10.1 Factory Locked Secured Silicon Sector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 10.2 Customer Lockable Secured Silicon Sector 10.3 Secured Silicon Sector Entry/Exit Command Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 11. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 11 ...

  • Page 6

    ... Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 12.1 Command Definitions 12.2 Common Flash Memory Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 13. Advance Information on S29GL MirrorBit Hardware Reset (RESET#) and Power-up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 14. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

  • Page 7

    Figures Figure 3.1 S29GL-P Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

  • Page 8

    ... Package Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 Table 12.1 S29GL-P Memory Array Command Definitions, x16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 Table 12.2 S29GL-P Sector Protection Command Definitions, x16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 Table 12.3 S29GL-P Memory Array Command Definitions .69 Table 12.4 S29GL-P Sector Protection Command Definitions .70 Table 12.5 CFI Query Identification String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 Table 12.6 System Interface String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72 Table 12 ...

  • Page 9

    ... The ordering part number is formed by a valid combination of the following: S29GL01GP DEVICE NUMBER/DESCRIPTION S29GL01GP, S29GL512P, S29GL256P, S29GL128P 3.0 Volt-only, 1024, 512, 256 and 128 Megabit Page-Mode Flash Memory, manufactured MirrorBit November 28, 2007 S29GL-P_00_A8 PACKING TYPE 0 = Tray (standard; see (Note 7” Tape and Reel 3 = 13” ...

  • Page 10

    Recommended Combinations Recommended Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific recommended combinations and to check on newly released combinations. Base Part Number S29GL01GP 10 (1), ...

  • Page 11

    Input/Output Descriptions & Logic Symbol Table 2.1 identifies the input and output package connections provided on the device. Symbol Type A25–A0 Input DQ14–DQ0 I/O DQ15/A-1 I/O CE# Input OE# Input WE# Input V Supply CC ...

  • Page 12

    ... Special Handling Instructions for BGA Package Special handling is required for Flash Memory products in BGA packages. Flash memory devices in BGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. ...

  • Page 13

    RFU A7 A13 WE# RESET# A4 RY/BY# WP#/ACC RFU Note RFU = No Connect (NC) November 28, 2007 S29GL-P_00_A8 ...

  • Page 14

    LAA064—64 ball Fortified Ball Grid Array Figure 4.2 LAA064—64ball Fortified Ball Grid Array (FBGA ...

  • Page 15

    A23 1 A22 2 A15 3 A14 4 A13 5 A12 6 A11 7 A10 A19 11 A20 12 WE# 13 RESET# 14 A21 15 WP#/ACC 16 RY/BY# 17 A18 18 ...

  • Page 16

    TS056—56-Pin Standard Thin Small Outline Package (TSOP) Figure 4.4 56-Pin Thin Small Outline Package (TSOP PACKAGE TS 56 JEDEC MO-142 (B) EC SYMBOL MIN. NOM. MAX. A --- --- 1.20 A1 0.05 --- 0.15 A2 ...

  • Page 17

    ... Migration to S29GL128N and S29GL256N based on 110nm MirrorBit Optimizing Program/Erase Times Practical Guide to Endurance and Data Retention Configuring FPGAs using Spansion S29GL-N Flash Connecting Spansion™ Flash Memory to a System Address Bus Connecting Unused Data Lines of MirrorBit Reset Voltage and Timing Requirements for MirrorBit Versatile IO: DQ and Enhanced 5 ...

  • Page 18

    ... Table 6.2 S29GL512P Sector & Memory Address Map Sector Sector Count Range Address Range (16-bit) SA00 0000000h - 000FFFFh 512 : SA511 1FF0000H - 1FFFFFFh Table 6.3 S29GL256P Sector & Memory Address Map Sector Sector Count Range Address Range (16-bit) SA00 0000000h - 000FFFFh 256 : SA255 0FF0000H - 0FFFFFFh ® ...

  • Page 19

    ... Operations are initiated by writing specific commands or a sequence with specific address and data patterns into the command registers (see occupy any addressable memory location; rather composed of latches that store the commands, along with the address and data information needed to execute the command. The contents of the register serve as input to the internal state machine and the state machine outputs dictate the function of the device ...

  • Page 20

    ... The device defaults to reading array data after device power-up or hardware reset. To read data from the memory array, the system must first assert a valid address on Amax-A0, while driving OE# and CE WE# must remain at V ...

  • Page 21

    ... Autoselect The Autoselect mode provides manufacturer ID, Device identification, and sector protection information, through identifier codes output from the internal register (separate from the memory array) on DQ7-DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding programming algorithm (see in-system ...

  • Page 22

    Table 7.2 Autoselect Codes, (High Voltage Method) Description CE# OE# WE# Manufacturer ID Spansion Product Cycle 1 Cycle Cycle 3 Cycle 1 Cycle Cycle 3 Cycle 1 Cycle 2 ...

  • Page 23

    ... The following source code example of using the autoselect function to read the manufacturer ID. Refer to the Spansion Low Level Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash memory software development guidelines. /* Here is an example of Autoselect mode (getting manufacturer ID Define UINT16 example: typedef unsigned short UINT16; */ UINT16 manuf_id ...

  • Page 24

    Program/Erase Operations These devices are capable of several modes of programming and or erase operations which are described in detail in the following sections. During a write operation, the system must drive CE# and WE command, and ...

  • Page 25

    PASS. Device is in November 28, 2007 S29GL-P_00_A8 Figure 7.1 Single Word Program Write Unlock Cycles: Address 555h, ...

  • Page 26

    ... The Write Operation Status bits should be used while monitoring the last address location loaded into the write buffer. This eliminates the need to store an address in memory because the system can load the last address location, issue the program confirm command at the last loaded address location, and then check the write operation status at that same address ...

  • Page 27

    ... Unlock Bypass mode. Note that the Secured Silicon sector, autoselect, and CFI functions are unavailable when a program operation is in progress. Write buffer programming is allowed in any sequence of memory (or address) locations. These flash devices are capable of handling multiple write buffer programming operations on the same write buffer address range without intervening erases ...

  • Page 28

    ... The following source code example of using the write buffer program function. Refer to the Spansion Low Level Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash memory software development guidelines. /* Example: Write Buffer Programming Command /* NOTES: Write buffer programming limited to 16 words. */ ...

  • Page 29

    Write Next Word, Decrement wc – 1 RESET. Issue Write Buffer Abort Reset Command November 28, 2007 S29GL-P_00_A8 ...

  • Page 30

    ... The device does not require the system to preprogram a sector prior to erase. The Embedded Erase algorithm automatically programs and verifies the entire memory to an all zero data pattern prior to electrical erase. After a successful sector erase, all locations within the erased sector contain FFFFh. The system is not required to provide any controls or timings during these operations ...

  • Page 31

    Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h Write Sector Erase Cycles: Address 555h, Data 80h Address 555h, Data AAh Address 2AAh, Data 55h Sector Address, Data 30h Select No Additional Sectors? Yes ...

  • Page 32

    ... Embedded Erase algorithm, which does not require the system to preprogram prior to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire memory to an all zero data pattern prior to electrical erase. After a successful chip erase, all locations of the chip contain FFFFh. The system is not required to provide any controls or timings during these operations ...

  • Page 33

    ... The following source code example of using the erase resume function. Refer to the Spansion Low Level Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash memory software development guidelines. /* Example: Erase resume command */ *( (UINT16 *)sector_addr ) = 0x0030; /* The flash needs adequate time in the resume state */ ...

  • Page 34

    ... The system may also write the Autoselect Command Sequence when the device is in Program Suspend mode. The device allows reading Autoselect codes in the suspended sectors, since the codes are not stored in the memory array. When the device exits the Autoselect mode, the device reverts to Program Suspend mode, and is ready for another valid operation. See After the Program Resume command is written, the device reverts to programming ...

  • Page 35

    ... Software Functions and Sample Code The following are C source code examples of using the unlock bypass entry, program, and exit functions. Refer to the Spansion Low Level Driver User’s Guide (available soon on www.spansion.com) for general information on Spansion Flash memory software development guidelines. Cycle 1 ...

  • Page 36

    Cycle 1 Program Setup Command 2 Program Command /* Example: Unlock Bypass Program Command /* Do while in Unlock Bypass Entry Mode! *( (UINT16 *)base_addr ) = 0x00A0; *( (UINT16 *) Poll until done or error ...

  • Page 37

    the status or valid data. Even if the device has completed the program or erase operation and DQ7 has valid data, the data outputs on DQ6-DQ0 may be still invalid. Valid data on DQ7-D00 appears on ...

  • Page 38

    ... Refer to more details. Note When verifying the status of a write operation (embedded program/erase memory sector, DQ6 and DQ2 toggle between high and low states in a series of consecutive and contiguous status read cycles. In order for 38 ...

  • Page 39

    ... not possible to temporarily prevent reads to other memory sectors, then it is recommended to use the DQ7 status bit as the alternative method of determining the active or inactive status of the write operation ...

  • Page 40

    ... When RESET# is held the standby current is greater. RESET# may be tied to the system reset circuitry which enables the SS system to read the boot-up firmware from the Flash memory upon a system reset. See on page 58 and Figure 11.8 on page 59 40 ...

  • Page 41

    ... Note Base = Base Address. The following source code example of using the reset function. Refer to the Spansion Low Level Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash memory software development guidelines. /* Example: Reset (software reset of Flash state machine (UINT16 *)base_addr ) = 0x00F0; ...

  • Page 42

    ... The Advanced Sector Protection/Unprotection feature disables or enables programming or erase operations in any or all sectors and can be implemented through software and/or hardware methods, which are independent of each other. This section describes the various methods of protecting data stored in the memory array. An overview of these methods in shown in Figure 8.1 Advanced Sector Protection/Unprotection Hardware Methods ...

  • Page 43

    ... Persistent Protection Bits The Persistent Protection Bits are unique and nonvolatile for each sector and have the same endurances as the Flash memory. Preprogramming and verification prior to erasure are handled by the device, and therefore do not require system monitoring. Notes 1. Each PPB is individually programmed and all are erased in parallel. ...

  • Page 44

    There are no means for individually erasing a specific PPB and no specific sector address is required for this operation. 9. Exit command must be issued after the execution which resets the device to read mode and re- enables ...

  • Page 45

    8.2.1 Dynamic Protection Bits Dynamic Protection Bits are volatile and unique for each sector and can be individually modified. DYBs only control the protection scheme for unprotected sectors that have their PPBs cleared (erased to “1”). ...

  • Page 46

    There is no means to verify what the password is after it is set. 6. The Password Mode Lock Bit, once set, prevents reading the 64-bit password on the data bus and further password programming. 7. The Password Mode ...

  • Page 47

    Write Unlock Cycles: Address 555h, Data AAh Address 2AAh, Data 55h Enter Lock Register Command: Address 555h, Data 40h Program Lock Register Data Address XXXh, Data A0h Address XXXh*, Data PD Perform Polling Algorithm (see Write ...

  • Page 48

    Advanced Sector Protection Software Examples Table 8.2 Sector Protection Schemes: DYB, PPB and PPB Lock Bit Combinations Unique Device PPB Lock Bit 0 = locked 1 = unlocked Any Sector Any Sector Any Sector Any Sector Any Sector Any ...

  • Page 49

    ... V ± 0.3 V, the standby current is greater. SS RESET# may be tied to the system reset circuitry and thus, a system reset would also reset the Flash memory, enabling the system to read the boot-up firmware from the Flash memory. 9.4 Output Disable (OE#) When the OE# input impedance state ...

  • Page 50

    ... Secured Silicon Sector Flash Memory Region The Secured Silicon Sector provides an extra Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The Secured Silicon Sector is 128 words in length and all Secured Silicon reads outside of the 128-word address range returns invalid data. The Secured Silicon Sector Indicator Bit, DQ7, (at Autoselect address 03h) is used to indicate whether or not the Secured Silicon Sector is locked when shipped from the factory ...

  • Page 51

    ... After the system has written the Enter Secured Silicon Sector command sequence, it may read the Secured Silicon Sector by using the addresses normally occupied by sector SA0 within the memory array. This mode of operation continues until the system issues the Exit Secured Silicon Sector command sequence, or until power is removed from the device ...

  • Page 52

    Cycle Unlock Cycle 1 Unlock Cycle 2 Program Setup Program Note Base = Base Address. /* Once in the SecSi Sector mode, you program */ /* words using the programming algorithm. Cycle Unlock Cycle 1 Unlock Cycle 2 Exit Cycle ...

  • Page 53

    11. Electrical Specifications 11.1 Absolute Maximum Ratings Description Storage Temperature, Plastic Packages Ambient Temperature with Power Applied Voltage with Respect to Ground Output Short Circuit Current (Note 3) Notes 1. Minimum DC voltage on input or ...

  • Page 54

    Operating Ranges Ambient Temperature (TA), Industrial (I) Device Ambient Temperature (TA), Commercial (C) Device Supply Voltages V Supply Voltages IO Notes 1. Operating ranges define those limits between which the functionality of the device is guaranteed. 2. See also ...

  • Page 55

    11.5 Switching Waveforms V IO Input 0 0.0 V Note If V < the input measurement reference level is 0 11.6 DC Characteristics Table 11.2 S29GL-P DC Characteristics (CMOS ...

  • Page 56

    AC Characteristics 11.7.1 S29GL-P Read-Only Operations Parameter Description JEDEC Std. (Notes Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time ...

  • Page 57

    Addresses CE# OE# WE# Outputs RESET# RY/BY Amax:A3 A2:A0 (See Note) Data Bus CE# OE# Note Figure 11.6 shows word mode. Addresses are A2:A-1 for byte mode. November 28, 2007 S29GL-P_00_A8 ...

  • Page 58

    Hardware Reset (RESET#) Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms Ready Read Mode or Write mode RESET# Pin Low (NOT During Embedded Algorithms) t Ready to Read Mode or Write mode t RESET# Pulse Width ...

  • Page 59

    CE# RESET# 11.7.3 S29GL-P Erase and Program Operations Table 11.6 S29GL-P Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV WC ...

  • Page 60

    Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word mode. Figure ...

  • Page 61

    Figure 11.11 Chip/Sector Erase Operation Timings Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes ...

  • Page 62

    Figure 11.13 Toggle Bit Timings (During Embedded Algorithms) Addresses CE# t OEH WE# OE Valid Data DQ2 and DQ6 RY/BY# Note A = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, ...

  • Page 63

    11.7.4 S29GL-P Alternate CE# Controlled Erase and Program Operations Table 11.7 S29GL-P Alternate CE# Controlled Erase and Program Operations Parameter Description JEDEC Std. (Notes Write Cycle Time (Note 1) AVAV Address ...

  • Page 64

    Figure 11.15 Alternate CE# Controlled Write (Erase/Program) Operation Timings 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes 1. Figure 11.15 indicates last two bus cycles of ...

  • Page 65

    11.7.5 Erase And Programming Performance Table 11.8 Erase And Programming Performance Parameter Sector Erase Time S29GL128P S29GL256P Chip Erase Time S29GL512P S29GL01GP Total Write Buffer Time (Note 3) Total Accelerated Write Buffer Programming Time (Note 3) ...

  • Page 66

    Appendix This section contains information relating to software control or interfacing with the Flash device. For additional information and assistance regarding software, see the Spansion web site at www.spansion.com. 12.1 Command Definitions Writing specific address and data commands or ...

  • Page 67

    ... Legend X = Don’t care RA = Address of the memory to be read Data read from location RA during read operation Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens later. Notes 1. See Table 7.1 on page 19 for description of bus operations. ...

  • Page 68

    Table 12.2 S29GL-P Sector Protection Command Definitions, x16 Command (Notes) Command Set Entry 3 Program (6) 2 Read (6) 1 Command Set Exit ( Command Set Entry 3 Password Program (9) 2 Password Read (10) 4 Password Unlock ...

  • Page 69

    ... Legend X = Don’t care RA = Address of the memory to be read Data read from location RA during read operation Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever happens later. Notes 1. See Table 7.1 on page 19 for description of bus operations. ...

  • Page 70

    Table 12.4 S29GL-P Sector Protection Command Definitions, x8 Command (Notes) Command Set Entry 3 Bits Program (6) 2 Read (6) 1 Command Set Exit ( Command Set Entry 3 Password Program (9) 2 Password Read (10) 8 Password ...

  • Page 71

    ... The system must write the reset command to return the device to reading array data. The following source code example of using the CFI Entry and Exit functions. Refer to the Spansion Low Level Driver User’s Guide (available on www.spansion.com) for general information on Spansion Flash memory software development guidelines. /* Example: CFI Entry command */ *( (UINT16 *)base_addr + 0x55 ) = 0x0098; ...

  • Page 72

    Addresses (x16) Addresses (x8) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch Addresses (x16) Addresses (x8) 27h 4Eh 28h 50h 29h 52h 2Ah 54h ...

  • Page 73

    Table 12.8 Primary Vendor-Specific Extended Query Addresses (x16) Addresses (x8) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h ...

  • Page 74

    Advance Information on S29GL MirrorBit Hardware Reset (RESET#) and Power-up Sequence Parameter t RESET# Low to CE# Low RPH t RESET# Pulse Width RP t Time between RESET# (high) and CE# (low) RH Note CE#, OE# and ...

  • Page 75

    14. Revision History Section Revision A0 (October 29, 2004) Initial Release. Revision A1 (October 20, 2005) Global Revised all sections of document. Revision A2 (October 19, 2006) Revised all sections of document. Reformatted document to new ...

  • Page 76

    Section Revision A8 (November 28, 2007) Ordering Information New commercial operating temperature option Operating Ranges New operating temperature range ...

  • Page 77

    ... Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright © 2004–2007 Spansion Inc. All rights reserved. Spansion ™ SIM and combinations thereof, are trademarks of Spansion LLC in the US and other countries ...