S29GL01GP12TFI010 Spansion Inc., S29GL01GP12TFI010 Datasheet - Page 74
S29GL01GP12TFI010
Manufacturer Part Number
S29GL01GP12TFI010
Description
Flash 3V 1 Gb Mirrorbit highest address120ns
Manufacturer
Spansion Inc.
Datasheet
1.S29GL01GP11TFIR10.pdf
(77 pages)
Specifications of S29GL01GP12TFI010
Memory Type
NOR
Memory Size
1 Gbit
Access Time
110 ns
Data Bus Width
8 bit, 16 bit
Architecture
Uniform
Interface Type
Page-mode
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
50 mA
Mounting Style
SMD/SMT
Operating Temperature
+ 85 C
Package / Case
TSOP-56
Memory Configuration
128K X 16
Ic Interface Type
Parallel
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
BGA
No. Of Pins
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S29GL01GP12TFI010
Manufacturer:
CYPRE
Quantity:
20 000
13. Advance Information on S29GL-R 65 nm MirrorBit Hardware
74
Reset (RESET#) and Power-up Sequence
Note
CE#, OE# and WE# must be at logic high during Reset Time.
Note
The sum of t
Notes
1. V
2. V
3. Maximum V
Note
The sum of t
Parameter
Parameter
RESET#
does not permit any read and write operations, valid read operations return FFh, and a hardware reset is required.
t
t
t
t
IO
IO
VIOS
RPH
t
t
VCS
RPH
t
t
RP
RH
RP
RH
CE#
< V
and V
V
V
CC
IO
CC
RP
RP
CC
+ 200 mV.
RESET# Low to CE# Low
RESET# Pulse Width
Time between RESET# (high) and CE# (low)
V
V
RESET# Low to CE# Low
RESET# Pulse Width
Time between RESET# (high) and CE# (low)
CC
and t
and t
CC
IO
ramp must be in sync during power-up. If RESET# is not stable for 500 µs, the following conditions may occur: the device
power up current is 20 mA (RESET# =V
Setup Time to first access
Setup Time to first access
RH
RH
RESET#
must be equal to or greater than t
must be equal to or greater than t
CE#
S29GL-P MirrorBit
D a t a
Table 13.2 Power-Up Sequence Timings
Table 13.1 Hardware Reset (RESET#)
Figure 13.2 Power-On Reset Timings
Figure 13.1 Reset Timings
Description
Description
S h e e t
t
RP
RPH
RPH
IL
t
).
®
t
.
VIOS
.
VCS
Flash Family
t
RPH
( P r e l i m i n a r y )
t
RP
t
RH
t
RPH
S29GL-P_00_A8 November 28, 2007
t
RH
Limit
Limit
Min
Min
Min
Min
Min
Min
Min
Min
Time
Time
200
200
300
300
200
200
35
35
Unit
Unit
µs
ns
ns
µs
µs
µs
ns
ns