SM1212E433 Semtech, SM1212E433 Datasheet - Page 32

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SM1212E433

Manufacturer Part Number
SM1212E433
Description
RF Module For SX1212
Manufacturer
Semtech
Series
-r
Type
Transceiver, ISMr
Datasheets

Specifications of SM1212E433

Frequency
433MHz
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
SX1212E
For proper operation, the Bit Synchronizer must first receive three bytes of alternating logic value preamble, i.e.
“0101” sequences. After this startup phase, the rising edge of DCLK signal is centered on the demodulated bit.
Subsequent data transitions will preserve this centering.
This has two implications:
This implies approximately 6 consecutive unbalanced bytes when the Bit Rate precision is 1%, which is easily
achievable (crystal tolerance is in the range of 50 to 100 ppm).
Bit Synchronizer and Active channel filter settings are a function of the reference oscillator crystal frequency, F
Settings other than those programmable with a 12.8 MHz crystal can be obtained by selection of the correct
reference oscillator frequency. Please contact your local Semtech representative for further details.
After OOK or FSK demodulation, the baseband signal is made available to the user on pin 20, DATA, when
Continuous mode is selected.
In Buffered and Packet modes, the data is retrieved from the FIFO through the SPI interface.
Rev 2 – June 18th, 2009
ADVANCED COMMUNICATIONS & SENSING
Firstly, if the Bit Rates of Transmitter and Receiver are known to be the same, the SX1212 will be able to
receive an infinite unbalanced sequence (all “0s” or all ”1s”) with no restriction.
If there is a difference in Bit Rate between Tx and Rx, the amount of adjacent bits at the same level that the
BitSync can withstand can be estimated as:
3.4.12. Alternative Settings
3.4.13. Data Output
NumberOfBi
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SX1212
XTAL
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