SM1212E433 Semtech, SM1212E433 Datasheet - Page 35

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SM1212E433

Manufacturer Part Number
SM1212E433
Description
RF Module For SX1212
Manufacturer
Semtech
Series
-r
Type
Transceiver, ISMr
Datasheets

Specifications of SM1212E433

Frequency
433MHz
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
SX1212E
Table 14: Data Operation Mode Selection
Each of these data operation modes is described fully in the following sections.
As illustrated in the Figure 26 below, the SX1212’s SPI interface consists of two sub blocks:
Both interfaces are configured in slave mode whilst the uC is configured as the master. They have separate
selection pins (NSS_CONFIG and NSS_DATA) but share the remaining pins:
As described below, only one interface can be selected at a time with NSS_CONFIG having the priority:
Rev 2 – June 18th, 2009
ADVANCED COMMUNICATIONS & SENSING
5.2. Control Block Description
SPI Config: used in all data operation modes to read and write the configuration registers which control all the
parameters of the chip (operating mode, bit rate, etc...)
SPI Data: used in Buffered and Packet mode to write and read data bytes to and from the FIFO. (FIFO
interrupts can be used to manage the FIFO content.)
SCK (SPI Clock): clock signal provided by the uC
MOSI (Master Out Slave In): data input signal provided by the uC
MISO (Master In Slave Out): data output signal provided by the SX1212
MCParam_Data_mode
5.2.1. SPI Interface
Registers
Registers
Config.
Config.
FIFO
00
01
1x
5.2.1.1. Overview
SX1212
Data Operation Mode
Figure 26: SPI Interface Overview and uC Connections
Continuous
Buffered
Packet
CONFIG
(slave)
(slave)
SPI
DATA
SPI
Page 35 of 77
NSS_CONFIG
MOSI
MISO
SCK
NSS_DATA
NSS_DATA
MOSI
MISO
SCK
NSS_CONFIG
(master)
µ C
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SX1212

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