SP706SCN-L Exar Corporation, SP706SCN-L Datasheet - Page 10

• Manufacturer Part Number: SP706SCN-L
• Description: Low Power Microprocessor Supervisory Circuits
• Manufacturer: Exar Corporation
• Type: Simple Reset/Power-On Resetr

Specifications of SP706SCN-L

• Number Of Voltages Monitored: 1
• Reset: Active Low
• Reset Timeout: 140 ms Minimum
• Voltage - Threshold: 2.93V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FEATURES
The
provides four key functions:
1. A reset output during power-up, power-
down and brownout conditions.
2. An independent watchdog output that goes
LOW if the watchdog input has not been
toggled within 1.6 seconds.
3. A 1.25V threshold detector for power-fail
warning, low battery detection, or monitoring
a power supply other than +3.3V/+3.0V.
4. An active-LOW manual-reset that allows
RESET to be triggered by a pushbutton switch.
The SP706R/S/T devices are the same as the
SP708R/S/T devices except for the active-
HIGH RESET substitution of the watchdog
timer.
THEORY OF OPERATION
The
microprocessor (µP) supervisory circuit that
monitors the power supplied to digital circuits
such as microprocessors, microcontrollers, or
memory. The series is an ideal solution for
portable,
requires
Implementing
number of components and overall complexity.
The watchdog functions of this product family
will
status of a system. The operational features
and benefits of the SP706R/S/T-SP708R/S/T
series are described in more detail below.
RESET O
A microprocessor's reset input starts the µP in
a known state. The SP706R/S/T-SP708R/S/T
series asserts reset during power-up and
prevents code execution errors during power
down or brownout conditions.
On power-up, once V
guaranteed logic LOW of 0.4V or less. As V
rises, RESET stays LOW. When V
the reset threshold, an internal timer releases
RESET
whenever V
such as in a brownout condition. When a
© 2010 Exar Corporation
continuously
SP706R/S/T
SP706R/S/T-SP708R/S/T
after
UTPUT
battery-powered
CC
power
dips below the reset threshold,
200ms.
this
oversee
and
CC
series
reaches 1V, RESET is a
supply
RESET
SP708R/S/T
will
equipment
the
3
3
CC
series
pulses
.
.
reduce
0
0
monitoring.
rises above
operational
V
V
/
/
3
3
series
is
.
.
LOW
3
3
that
the
V
V
CC
a
L
L
10/16
o
o
w
w
brownout condition occurs in the middle of a
previously initiated reset pulse, the pulse
continues for at least another 140ms. On
power down, once V
threshold,
guaranteed to be 0.4V or less until V
below 1V.
The active-HIGH RESET output is simply the
complement of the RESET output and is
guaranteed to be valid with V
Some µPs, such as Intel's 80C51, require an
active-HIGH reset pulse.
W
The SP706R/S/T-SP708R/S/T watchdog circuit
monitors the µP's activity. If the µP does not
toggle the watchdog input (WDI) within 1.6
seconds and WDI is not tri-stated, WDO goes
LOW. As long as RESET is asserted or the WDI
input is tri-stated, the watchdog timer will stay
cleared and will not count. As soon as RESET
is released and WDI is driven HIGH or LOW,
the timer will start counting. Pulses as short as
50ns can be detected.
Typically, WDO will be connected to the non-
maskable interrupt input (NMI) of a µP. When
V
go LOW whether or not the watchdog timer
had timed out. Normally this would trigger an
NMI but RESET goes LOW simultaneously and
thus overrides the NMI.
If WDI is left unconnected, WDO can be used
as a low-line output. Since floating WDI
disables the internal timer, WDO goes LOW
only when V
thus functioning as a low-line output.
P
P
CC
o
o
ATCHDOG
w
drops below the reset threshold, WDO will
w
S
S
P
P
e
e
r
r
7
7
Fig. 18: Watchdog Timing Waveforms
M
M
0
0
i
6
i
6
CC
T
c
c
RESET
R
R
IMER
r
r
falls below the reset threshold,
o
o
/
/
p
p
S
S
r
r
o
o
/
/
c
c
CC
T
T
stays
e
e
s
s
-
-
falls below the reset
s
s
S
S
o
o
r
P
r
P
CC
LOW
S
S
7
7
down to 1.1V.
u
u
0
0
p
p
8
8
e
e
C
C
R
R
r
Rev. 2.0.0
r
i
and
CC
i
v
v
/
/
r
r
i
i
c
c
S
s
s
S
drops
u
u
o
o
/
/
i
i
r
r
t
t
T
T
y
is
y
s
s