ADV7172KST Analog Devices Inc, ADV7172KST Datasheet - Page 19

ADV7172KST

Manufacturer Part Number
ADV7172KST
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7172KST

Number Of Dac's
6
Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
LQFP
Pin Count
48
Lead Free Status / RoHS Status
Not Compliant

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Mode 1: Master Option HSYNC, BLANK, FIELD
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode the ADV7172/ADV7173 can generate horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD
input when HSYNC is low indicates a new frame, i.e., vertical retrace. The BLANK signal is optional. When the BLANK input is
disabled, the ADV7172/ADV7173 automatically blanks all normally blank lines as per CCIR-624. Pixel data is latched on the rising
clock edge following the timing signal transitions. Mode 1 is illustrated in Figure 27 (NTSC) and Figure 28 (PAL). Figure 29 illus-
trates the HSYNC, BLANK, and FIELD for an odd-or-even field transition relative to the pixel data.
HSYNC
BLANK
FIELD
HSYNC
BLANK
FIELD
309
DISPLAY
622
DISPLAY
HSYNC
BLANK
310
FIELD
PIXEL
DATA
623
311
ODD FIELD
624
NTSC = 16
EVEN FIELD
PAL = 12
312
625
EVEN FIELD
CLOCK/2
CLOCK/2
313
ODD FIELD
1
314
2
315
3
VERTICAL BLANK
316
VERTICAL BLANK
4
317
5
318
6
319
PAL = 132
NTSC = 122
7
320
CLOCK/2
Cb
CLOCK/2
ADV7172/ADV7173
Y
21
Cr
334
22
Y
335
DISPLAY
23
DISPLAY
336

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