TC6387XB Toshiba, TC6387XB Datasheet - Page 19

• Manufacturer Part Number: TC6387XB
• Manufacturer: Toshiba

Specifications of TC6387XB

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

+De-asserting Method
4.5.4 Buffer read enable interrupt
+ Interrupt Assert Condition
+ Factor Evaluation Method
+De-asserting Method
SDIO Card
SDIO Card
SD memory Card
SD memory Card
TOSHIBA CONFIDENTIAL
(1) "0" is written into the SBWE bit(D9) of SD Buffer Control & Error Status Register(Offset:01E-01Fh).
(2) "1" is written into the MBWE bit(D25) of SD Interrupt Mask Register(Offset:020-023h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:0E0h).
(1) "0" is written into the SBWE bit(D9) of SD Buffer Control & Error Status Register(Offset:11E-11Fh).
(2) "1" is written into the MBWE bit(D25) of SD Interrupt Mask Register(Offset:120-123h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:1E0h).
(1) "0" is written into the SBRE bit(D8) of SD Buffer Control & Error Status Register(Offset:01E-01Fh).
(2) "1" is written into the MBRE bit(D24) of SD Interrupt Mask Register(Offset:020-023h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:0E0h).
(5) "0" is written into the SBRE bit(D8) of SD Buffer Control & Error Status Register(Offset:11E-11Fh).
(6) "1" is written into the MBRE bit(D24) of SD Interrupt Mask Register(Offset:120-123h).
(7) Hardware reset by #PCLR = “0”.
(8) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:1E0h).
When one block of data from the card is stored fully into the internal buffer for a read command, an interrupt is
generated.
01Fh) is set to "1". In the case of SDIO Card, the SBRE bit(D8) of SD Buffer Control & Error Status
Register(Offset:11E-11Fh) is set to "1".
In the case of SD memory Card, the SBRE bit(D8) of SD Buffer Control & Error Status Register(Offset:01E-
SDCD3-0
SDCLK
#HINT
HCLK
TC6387XB Specification
Read Data
TOTAL
CRC16
62
Rev. 1.0 02/02/06
PAGE NO.19