TC6387XB Toshiba, TC6387XB Datasheet - Page 35

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TC6387XB

Manufacturer Part Number
TC6387XB
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC6387XB

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Not Compliant

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4.5.17 Command Index error interrupt
+ Interrupt Assert Condition
+ Factor Evaluation Method
+De-asserting Method
SDIO Card
SD memory Card
TOSHIBA CONFIDENTIAL
(1) "0" is written into the SCIX bit(D0) of SD Buffer Control & Error Status Register(Offset:01E-01Fh).
(2) "1" is written into the MCIX bit(D16) of SD Interrupt Mask Register(Offset:020-023h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:0E0h).
(1) "0" is written into the SCIX bit(D0) of SD Buffer Control & Error Status Register(Offset:11E-11Fh).
(2) "1" is written into the MCIX bit(D16) of SD Interrupt Mask Register(Offset:120-123h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:1E0h).
If the command index portion of the response received from the card does not agree with the index issued just
before, an interrupt is generated.
In the case of SD memory Card, the SCIX bit(D0) of SD Buffer Control & Error Status Register(Offset:01E-
01Fh) and the RCMDE bit(D0) of SD Error Detail Status Register(Offset:02C-02Fh) are set to "1". If a response
for automatically issued CMD12 is not normal, "1" is set to the SCMDE bit(D0).
In the case of SDIO Card, the SCIX bit(D0) of SD Buffer Control & Error Status Register(Offset:11E-11Fh) and
the RCMDE bit(D0) of SD Error Detail Status Register(Offset:12C-12Fh) are set to "1".
SDCMD
SDCLK
#HINT
HCLK
command index
Abnormal
TC6387XB Specification
End bit
TOTAL
62
Rev. 1.0 02/02/06
PAGE NO.35

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