MT18JSF51272AY-1G1A1 Micron Technology Inc, MT18JSF51272AY-1G1A1 Datasheet

MT18JSF51272AY-1G1A1

Manufacturer Part Number
MT18JSF51272AY-1G1A1
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT18JSF51272AY-1G1A1

Main Category
DRAM Module
Sub-category
DDR3 SDRAM
Module Type
240UDIMM
Device Core Size
72b
Organization
512Mx72
Total Density
4GByte
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Operating Current
2.475A
Number Of Elements
18
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
240
Mounting
Socket
Lead Free Status / RoHS Status
Compliant
DDR3 SDRAM UDIMM
MT18JSF25672A – 2GB
MT18JSF51272A – 4GB
For component data sheets, refer to Micron’s Web site:
Features
• DDR3 functionality and operations supported as
• 240-pin, unbuffered dual in-line memory module
• Fast data transfer rates: PC3-10600, PC3-8500,
• 2GB (256 Meg x 72), 4GB (512 Meg x 72)
• V
• V
• Supports ECC error detection and correction
• Nominal and dynamic on-die termination (ODT) for
• Dual rank
• On-board I
• 8 internal device banks
• Fixed burst chop (BC) of 4 and burst length (BL) of 8
• Selectable BC4 or BL8 on-the-fly (OTF)
• Gold edge contacts
• Lead-free
• Fly-by topology
• Terminated control, command, and address bus
Table 1:
PDF: 09005aef83014429/Source: 09005aef83014466
JSF18C256_512x72A.fm - Rev. C 5/08 EN
Speed
Grade
defined in the component data sheet
(UDIMM)
or PC3-6400
data, strobe, and mask signals
serial presence-detect (SPD) EEPROM
via the mode register set (MRS)
-1G5
-1G4
-1G3
-1G1
-1G0
-80C
-80B
DD
DDSPD
= 1.5V ±0.075V
= +3.0V to +3.6V
Nomenclature
2
PC3-10600
PC3-10600
PC3-10600
Key Timing Parameters
Industry
PC3-8500
PC3-8500
PC3-6400
PC3-6400
C temperature sensor with integrated
Products and specifications discussed herein are subject to change by Micron without notice.
CL = 10
1333
1333
1333
CL = 9
1333
1333
2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM
Data Rate (MT/s)
CL = 8
1333
1066
1066
1066
1066
www.micron.com
1
CL = 7
1066
1066
1066
Figure 1:
Notes: 1. Contact Micron for industrial temperature
Options
• Operating temperature
• Package
• Frequency/CAS latency
PCB height: 30.0mm (1.181in)
– Commercial (0°C ≤ T
– Industrial (–40°C ≤ T
– 240-pin DIMM (lead-free)
– 1.5ns @ CL = 8 (DDR3-1333)
– 1.5ns @ CL = 9 (DDR3-1333)
– 1.5ns @ CL = 10 (DDR3-1333)
– 1.87ns @ CL = 7 (DDR3-1066)
– 1.87ns @ CL = 8 (DDR3-1066)
– 2.5ns @ CL = 5 (DDR3-800)
– 2.5ns @ CL = 6 (DDR3-800)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. Not recommended for new designs.
CL = 6
800
800
800
800
800
800
800
module offerings.
240-Pin UDIMM (MO-269 R/C E)
CL = 5
800
800
A
A
1
≤ +85°C)
≤ +70°C)
13.125
t
(ns)
12.5
13.5
RCD
©2008 Micron Technology, Inc. All rights reserved.
12
15
15
15
2
2
2
2
13.125
(ns)
13.5
12.5
t
12
15
15
15
RP
Marking
Features
None
-1G5
-1G4
-1G3
-1G1
-1G0
-80C
-80B
Y
I
50.625
(ns)
49.5
52.5
52.5
t
48
51
50
RC

Related parts for MT18JSF51272AY-1G1A1

MT18JSF51272AY-1G1A1 Summary of contents

Page 1

... For component data sheets, refer to Micron’s Web site: Features • DDR3 functionality and operations supported as defined in the component data sheet • 240-pin, unbuffered dual in-line memory module (UDIMM) • Fast data transfer rates: PC3-10600, PC3-8500, or PC3-6400 • 2GB (256 Meg x 72), 4GB (512 Meg x 72) • ...

Page 2

... Table 2: Addressing Parameter Refresh count Row address Device bank address Device configuration Column address Module rank address Table 3: Part Numbers and Timing Parameters – 2GB Modules Base device: MT41J128M8, 2 Part Number MT18JSF25672A(I)Y-1G5__ MT18JSF25672A(I)Y-1G4__ MT18JSF25672A(I)Y-1G3__ MT18JSF25672A(I)Y-1G1__ MT18JSF25672A(I)Y-1G0__ MT18JSF25672A(I)Y-80C__ MT18JSF25672A(I)Y-80B__ Table 4: Part Numbers and Timing Parameters – 4GB Modules ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin DDR3 UDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ25 61 REF ...

Page 4

... Input with write data. Center-aligned with write data. SDA I/O Serial data: SDA is a bidirectional pin used to transfer addresses and data into and out of the temperature sensor/SPD EEPROM on the module on the I EVENT# Output Temperature event: The EVENT# pin is asserted by the temperature sensor when (open drain) critical temperature thresholds have been exceeded ...

Page 5

... Termination voltage: Used for control, command, and address ( – No connect: These pins are not connected on the module. NF – No function: Connected within the module, but provides no functionality. PDF: 09005aef83014429/Source: 09005aef83014466 JSF18C256_512x72A.fm - Rev. C 5/08 EN 2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM Pin Assignments and Descriptions /2). DD Micron Technology, Inc ...

Page 6

Functional Block Diagram Figure 2: Functional Block Diagram S1# S0# DQS0 DQS0# DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 V SS DQS1 DQS1# DM1 DQ8 DQ DQ DQ9 DQ DQ10 DQ11 DQ DQ12 DQ DQ DQ13 DQ14 DQ ...

Page 7

... DRAM is connected to a single trace and terminated (rather than a tree structure, where the termination is off the module near the connector). Inherent to fly-by topology, the timing skew between the clock and DQS signals can be easily accounted for by using the write-leveling feature of DDR3 ...

Page 8

... Serial Presence-Detect EEPROM Operation DDR3 SDRAM modules incorporate serial presence-detect. The SPD data is stored in a 256-byte EEPROM. The first 128 bytes are programmed by Micron to comply with JEDEC Standard JC-45 “Appendix X: Serial Presence-Detect (SPD) for DDR3 SDRAM Modules.” These bytes identify module-specific timing parameters, configuration information, and physical attributes ...

Page 9

... Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability ...

Page 10

... Micron encourages designers to simulate the signal characteristics of the system’s memory bus to ensure adequate signal integrity of the entire memory system. Power Operating voltages are specified at the DRAM, not at the edge connector of the module. Designers must account for any system voltage drops at anticipated power levels to ensure the required supply voltage is maintained. ...

Page 11

... Refresh current Self refresh temperature current: MAX T Self refresh temperature current (SRT-enabled): MAX T All banks interleaved read current Notes: 1. One module rank in the active I 2. All ranks in this I PDF: 09005aef83014429/Source: 09005aef83014466 JSF18C256_512x72A.fm - Rev. C 5/08 EN 2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM UDIMM = 85° ...

Page 12

... Temperature Sensor with Serial Presence-Detect EEPROM The temperature sensor continuously monitors the module’s temperature and can be read back at any time over the I Table 12: Temperature Sensor with Serial Presence-Detect EEPROM Operating Conditions Parameter/Condition Supply voltage Supply current 3.3V DD Input high voltage: Logic 1; SCL, SDA Input low voltage: Logic 0 ...

Page 13

The interrupt mode enables software to reset EVENT# after a critical temperature threshold has been detected. Threshold points are set in the configuration register by the user. This mode triggers the critical temperature limit and both the MIN and MAX ...

Page 14

Table 14: Temperature Sensor Registers Name Pointer register Capability register Configuration register Alarm temperature upper boundary register Alarm temperature lower boundary register Critical temperature register Temperature register Pointer Register The pointer register selects which of the 16-bit registers is being ...

Page 15

Capability Register The capability register indicates the features and functionality supported by the temper- ature sensor. This register is a read-only register. Table 17: Capability Register (Address: 0x00 RFU RFU 7 6 RFU RFU Table 18: Capability Register ...

Page 16

Table 20: Configuration Register Bit Descriptions Bit Description 0 Event mode 0: Comparator mode 1: Interrupt mode 1 EVENT# polarity 0: Active LOW 1: Active HIGH 2 Critical event only 0: EVENT# trips on alarm or critical temperature event 1: ...

Page 17

Figure 4: Hysteresis Below window bit Above window bit Notes the value set in the alarm temperature lower boundary trip register Hyst is the value set ...

Page 18

Table 23: Alarm Temperature Lower Boundary Register (Address: 0x03 MSB Critical Temperature Register The critical temperature register is used to set the maximum temperature above the alarm window. The LSB for this ...

Page 19

Temperature Register The temperature register is a read-only register that provides the current temperature detected by the temperature sensor. The LSB for this register is 0.0625°C with a resolu- tion of 0.0625°C. The most significant bit (MSB) is 128°C in ...

Page 20

... TYP 123.0 (4.84) TYP Back view U13 U14 U15 U16 U17 5.0 (0.197) TYP 71.0 (2.79) TYP 20 Module Dimensions U8 U9 30.5 (1.20) 29.85 (1.175) 17.3 (0.68) TYP 9.5 (0.374) 0.8 (0.031) TYP TYP Pin 120 U18 U19 3.0 (0.118) 4X TYP Pin 121 47 ...

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