CY7C1049BV33-12ZC Cypress Semiconductor Corp, CY7C1049BV33-12ZC Datasheet - Page 4

• Manufacturer Part Number: CY7C1049BV33-12ZC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1049BV33-12ZC

• Density: 4Mb
• Access Time (max): 12ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 19b
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 200mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Word Size: 8b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Not Compliant

AC Switching Characteristics
Document #: 38-05139 Rev. *A
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
Notes:
power
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4.
5.
6.
7.
8.
9.
Parameter
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
This part has a voltage regulator which steps down the voltage from 5V to 3.3V internally. T.
is started.
t
At any given temperature and voltage condition, t
The internal write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a write, and the transition of either of
these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
The minimum write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the sum of t
OL
HZOE
/I
OH
, t
and 30-pF load capacitance.
HZCE
[8, 9]
, and t
V
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
CC
HZWE
(typical) to the First Access
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage.
Description
[7]
[6, 7]
[7]
[6, 7]
[6, 7]
[4]
Over the Operating Range
HZCE
[5]
is less than t
LZCE
Min.
12
12
10
10
10
1
3
0
3
0
0
0
7
0
3
, t
HZOE
-12
is less than t
Max.
12
12
12
6
6
6
6
LZOE
power
, and t
HZWE
Min.
15
15
12
12
12
time has to be provided initially before a read/write operation
1
3
0
3
0
0
0
8
0
3
HZWE
and t
-15
is less than t
SD
.
Max.
15
15
15
7
7
7
7
LZWE
for any given device.
Min.
17
17
13
13
13
CY7C1049BV33
1
3
0
3
0
0
0
9
0
3
-17
Max.
17
17
17
8
8
8
8
Page 4 of 10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
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