ISP1160BD/01 STEricsson, ISP1160BD/01 Datasheet - Page 62

• Manufacturer Part Number: ISP1160BD/01
• Manufacturer: STEricsson

Specifications of ISP1160BD/01

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 52.
ISP1160-01_7
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcITLBufferLength register: bit allocation
10.6.1 HcITLBufferLength register (R/W: 2AH/AAH)
10.6.2 HcATLBufferLength register (R/W: 2BH/ABH)
10.6 HC buffer RAM control registers
R/W
R/W
15
W
7
0
0
7
0
Table 51.
Write to this register to assign the ITL buffer size in bytes: ITL0 and ITL1 are assigned the
same value. For example, if HcITLBufferLength register is set to 2 kbytes, then ITL0 and
ITL1 would be allocated 2 kbytes each.
Must follow the formula:
ATL buffer length + 2 × (ITL buffer size) ≤ 1000H (that is, 4 kbytes)
where: ITL buffer size = ITL0 buffer length = ITL1 buffer length.
Code (Hex): 2A — read
Code (Hex): AA — write
Table 53.
Write to this register to assign ATL buffer size.
Code (Hex): 2B — read
Code (Hex): AB — write
Bit
15 to 0
Bit
15 to 0
R/W
R/W
14
W
6
0
0
6
0
Symbol
ITLBufferLength[15:0]
HcSoftwareReset register: bit description
HcITLBufferLength register: bit description
Symbol
Reset[15:0]
R/W
R/W
13
W
5
0
0
5
0
Rev. 07 — 29 September 2009
Description
Writing a reset value of F6H will cause the HC to reset all the registers
except its buffer memory.
ITLBufferLength[15:8]
ITLBufferLength[7:0]
R/W
R/W
12
W
4
0
0
4
0
Description
Assign ITL buffer length
Reset[7:0]
R/W
R/W
11
W
3
0
0
3
0
Embedded USB host controller
R/W
R/W
10
W
2
0
0
2
0
ISP1160/01
© ST-ERICSSON 2009. All rights reserved.
R/W
R/W
W
1
0
9
0
1
0
R/W
R/W
W
0
0
8
0
0
0
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