STPCI2HEYCE STMicroelectronics, STPCI2HEYCE Datasheet - Page 92

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STPCI2HEYCE

Manufacturer Part Number
STPCI2HEYCE
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of STPCI2HEYCE

Lead Free Status / RoHS Status
Compliant

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STPC® ATLAS
SDRAM components and the memory controller
will impact the timing budget. In order to get well
matched
recommended that all the DIMM clock pins, STPC
memory clock input (MCLKI) and any other
component
individually driven from a low skew clock driver
with matched routing lengths specified in
4.5.3.
92/108
Figure 6-22. DIMM placement
Figure 6-23. Clock Routing
* No additional 75mm when SDRAM directly soldered on board
. In other words, all clock line lengths that go
Low skew clock driver:
clocks
using
at
MCLKO
the
all
memory
components
clock
Section
it
are
SDRAM I/F
is
DIMM2
DIMM1
116mm
STPC
35mm
from the buffer to the memory chips (MCLKx) and
from the buffer to the STPC (MCLKI) must follow
this equation;
This is shown in
L+(1ns+/- 0.5ns)
L+75mm*
MCLKx = MCLKI+(1ns+/-0.5ns).
15mm
35mm
Figure
20pF
DIMM CKn input
DIMM CKn input
DIMM CKn input
10mm
6-23.
STPC MCLKI

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