MCIMX287CVM4B Freescale, MCIMX287CVM4B Datasheet - Page 52

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MCIMX287CVM4B

Manufacturer Part Number
MCIMX287CVM4B
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX287CVM4B

Lead Free Status / RoHS Status
Compliant

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3.4.13
SPDIF data is sent using bi-phase marking code. When encoding, the SPDIF data signal is modulated by
a clock that is twice the bit rate of the data signal.
The following
(spdif_clk) in SPDIF transmitter as shown in the
52
SPDIFOUT output (Load = 30pf)
Modulating Tx clock (spdif_clk) period
spdif_clk high period
spdif_clk low period
• Skew
• Transition Rising
• Transition Falling
SS14
SS15
SS16
SS17
SS1
SS2
SS3
SS4
SS5
spdif_clk
ID
(Input)
BITCLK period
BITCLK high period
BITCLK rise time
BITCLK low period
BITCLK fall time
BITCLK high to LRCLK high
BITCLK high to LRCLK low
SDATA setup time before BITCLK high
SDATA hold time after BITCLK high
SPDIF AC Timing
Table 56
Characteristics
i.MX28 Applications Processor Data Sheet for Consumer Products, Rev. 0
shows SPDIF timing parameters, including the timing of the modulating Tx clock
Table 55. SAIF Receiver Timing with Internal Clock
Parameter
Figure 35. spdif_clk Timing
Table 56. SPDIF Timing
spclkpl
Figure
Symbol
spclkph
spclkpl
spclkp
spclkp
35.
spclkph
Timing Parameter Range
81.4
65.1
65.1
Min
Min.
81.4
36.0
36.0
10.0
0.0
Max
13.6
18.0
Freescale Semiconductor
1.5
Max.
15.0
15.0
6.0
6.0
Unit
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns

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