MCIMX255AJM4A Freescale, MCIMX255AJM4A Datasheet - Page 109

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MCIMX255AJM4A

Manufacturer Part Number
MCIMX255AJM4A
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX255AJM4A

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3.7.18
This section describes the electrical specifications, operation modes, and timing of the touchscreen ADC.
3.7.18.1
Table 83
Freescale Semiconductor
• ”Tx” and “Rx” refer, respectively, to the transmit and receive sections of the SSI.
• For internal frame sync operation using external clock, the FS timing is the same as that of Tx data (for example, during AC97
Input sampling
capacitance ( C
Resolution
Resistance value
between ref and agndref
Sampling rate (fs)
Internal ADC/TSC clock
frequency
Multiplexed inputs
Data latency
Power-up time
clk falling edge to
sampling delay (tsd)
soc input setup time
before clk rising edge
(tsocst)
soc input hold time after
clk rising edge (tsochld)
eoc delay after clk rise
edge (teoc)
Valid data out delay after
eoc rise edge (tdata)
mode of operation).
Parameter
shows the electrical specifications for the touchscreen ADC.
Touchscreen ADC Electrical Specifications and Timing
1
S
ADC Electrical Specifications
)
No pin/pad capacitance included
With a 250fF load
With a 250fF load
i.MX25 Applications Processor for Automotive Products, Rev. 4
Table 83. Touchscreen ADC Electrical Specifications
Conditions
Timing Characteristics
Analog Bias
ADC
Min.
0.5
2
2
2
5
12.5
Typ.
1.6
12
14
8
2
5
1
3
7
8
Max.
1.75
125
10
13
8
3
6
cycles
cycles
MHz
Unit
kHz
bits
k
clk
clk
pF
ns
ns
ns
ns
ns
109

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