MC9328MX21VG Freescale, MC9328MX21VG Datasheet - Page 17

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MC9328MX21VG

Manufacturer Part Number
MC9328MX21VG
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9328MX21VG

Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

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Quantity
Price
Part Number:
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Part Number:
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Manufacturer:
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Quantity:
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All timing is measured at 30 pF loading with the exception of fast I/O signals as discussed below. Refer
to the reference manual’s System Control Chapter for details on drive strength settings.
Table 8
known as Fast I/O) to achieve 133 MHz operation. These critical signals include the SDRAM Clock
(SDCLK), Data Bus signals (D[31:0]), lower order address signals such as A0-A10, MA10, MA11, and
other signals required to meet 133 MHz timing.
The values shown in
taken to minimize parasitic capacitance of associated printed circuit board traces.
3.5
Parameters of the DPLL are given in
predivider and T
Freescale Semiconductor
Reference clock frequency range
Pre-divider output clock frequency
range
Double clock frequency range
Pre-divider factor (PD)
Total multiplication factor (MF)
EXTAL32k input jitter (peak to peak) for both System PLL and MCUPLL
EXTAL32k input jitter (peak to peak) for MCUPLL only
EXTAL32k startup time
Drive Strength Setting (DSCR2–DSCR12)
provides the maximum loading guidelines that can be tolerated on a memory I/O signal (also
DPLL Timing Specifications
Parameter
Table 8. Loading Guidelines for Fast IO Signals to Achieve 133 MHz Operation
dck
000: 3.5 mA
001: 4.5 mA
011: 5.5 mA
111: 6.5 mA
is the output double clock period.
Table 8
Parameter
Rise Time
Fall Time
Table 10. CLKO Rise/Fall Time (at 30pF Loaded)
apply over the recommended operating temperature range. Care must be
Vcc = 1.5V
Vcc = 1.5V
Vcc = 1.5V
Includes both integer and fractional parts
Table 9. 32k/26M Oscillator Signal Timing
MC9328MX21 Technical Data, Rev. 3.4
Table
Table 11. DPLL Specifications
Best Case
0.80
0.74
Test Conditions
11. In this table, T
Maximum I/O Loading at 1.8 V
Typical
1.00
1.08
12 pF
15 pF
19 pF
9 pF
Worst Case
ref
1.40
1.67
Minimum
is a reference clock period after the
800
Minimum
220
16
16
1
5
Units
ns
ns
Maximum I/O Loading at 3.0 V
RMS
5
5
Typical
12 pF
16 pF
21 pF
26 pF
Maximum
Maximum
100
20
320
560
32
16
15
Specifications
Unit
MHz
MHz
MHz
ms
Unit
ns
ns
17

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