853S54AKILF IDT, Integrated Device Technology Inc, 853S54AKILF Datasheet - Page 15

• Manufacturer Part Number: 853S54AKILF
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 853S54AKILF

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ICS853S54I Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS853S54I.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS853S54I is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipation in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 74.7°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (single layer or multi-layer).
Table 6. Thermal Resistance
ICS853S54AKI REVISION A DECEMBER 18, 2009
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
•
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 3 * 32mW = 96mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.252W * 74.7°C/W = 103.8°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.3V, with all outputs switching) = 155.925mW + 96mW = 251.925mW
MAX
MAX
= V
= 32mW/Loaded Output pair
CC_MAX
θ
JA
* I
for 16 Lead VFQFN, Forced Convection
EE_MAX
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 45mA = 155.925mW
* Pd_total + T
θ
JA
74.7°C/W
A
by Velocity
0
15
DUAL 2:1, 1:2 DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
65.3°C/W
JA
must be used. Assuming no air flow and
©2009 Integrated Device Technology, Inc.
58.5°C/W