853S54AKILF IDT, Integrated Device Technology Inc, 853S54AKILF Datasheet - Page 4

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853S54AKILF

Manufacturer Part Number
853S54AKILF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 853S54AKILF

Lead Free Status / RoHS Status
Supplier Unconfirmed
ICS853S54I Data Sheet
Table 4D. LVPECL DC Characteristics, V
NOTE 1: V
NOTE 2: Common mode input voltage is defined as V
NOTE 3: Outputs terminated with 50Ω to V
AC Electrical Characteristics
Table 5. AC Characteristics, V
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters are measured ≤ 1GHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Measured using clock input at 622.08MHz.
NOTE 5: Q/nQ output measured differentially. See Parameter Measurement Information for MUX Isolation diagram.
ICS853S54AKI REVISION A DECEMBER 18, 2009
Symbol
I
I
V
V
V
V
V
Symbol
f
t
tsk(pp)
tjit
MUX_
t
IH
IL
OUT
PD
R
OH
OL
PP
CMR
SWING
/ t
F
ISOLATION
IL
Parameter
Input
High Current
Input
Low Current
Peak-to-Peak Input Voltage; NOTE 1
Common Mode Input Voltage;
NOTE 1, 2
Output High Current; NOTE 3
Output Low Current; NOTE 3
Peak-to-Peak Output Voltage Swing
should not be less than -0.3V.
Parameter
Output Frequency
Propagation Delay;
NOTE 1
Part-to-Part Skew; NOTE 2, 3
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jitter Section; NOTE 4
MUX Isolation; NOTE 5
Output Rise/Fall Time
PCLKA[0:1], PCLKB
nPCLKA[0:1], nPCLKB
PCLKA[0:1], PCLKB
nPCLKA[0:1], nPCLKB
CC
= 2.375V to 3.465V, V
QA, nQA
QBx, nQBx
CC
– 2V.
CC
= 2.375V to 3.465V, V
IH
.
622.08MHz Integration Range:
V
V
CC
CC
Test Conditions
= 3.465V, V
= 3.465V, V
ƒ
OUT
V
V
Test Conditions
12kHz - 20MHz
EE
CC
CC
V
20% to 80%
PP
= 0V or V
= 622.08MHz,
= V
= V
= 800mV
4
IN
IN
IN
IN
= 0V
= 0V
EE
CC
= 0V, T
= 0V, V
V
V
Minimum
CC
CC
DUAL 2:1, 1:2 DIFFERENTIAL-TO-LVPECL/ECL MULTIPLEXER
A
= -40°C to 85°C
-200
-200
0.15
1.2
– 1.125
– 1.895
0.6
EE
Minimum
= -3.465V to -2.375V, T
225
195
75
V
V
CC
CC
Typical
Typical
©2009 Integrated Device Technology, Inc.
– 1.005
0.035
– 1.78
335
155
305
65
Maximum
V
V
Maximum
CC
CC
A
445
420
200
250
2.5
V
200
200
1.2
1.0
= -40°C to 85°C
– 0.875
– 1.62
CC
Units
GHz
Units
dB
ps
ps
ps
ps
ps
µA
µA
µA
µA
V
V
V
V
V

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