ICS9DB401CGLFT IDT, Integrated Device Technology Inc, ICS9DB401CGLFT Datasheet

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ICS9DB401CGLFT

Manufacturer Part Number
ICS9DB401CGLFT
Description
IC BUFFER 4OUTPUT DIFF 28-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Buffer/Driverr
Datasheet

Specifications of ICS9DB401CGLFT

Input
Clock
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
9DB401CGLFT

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Part Number:
ICS9DB401CGLFT
Manufacturer:
IDT
Quantity:
3 200
Four Output Differential Buffer for PCI Express
Description
The 9DB401C is a DB400 Version 2.0 Yellow Cover part with
PCI Express support. It can be used in PC or embedded
systems to provide outputs that have low cycle-to-cycle jitter
(50ps), low output-to-output skew (100ps), and are PCI Express
gen 1 compliant. The 9DB401C supports a 1 to 4 output
configuration, taking a spread or non spread differential HCSL
input from a CK410(B) main clock such as 954101 and
932S401, or any other differential HCSL pair. 9DB401C can
generate HCSL or LVDS outputs from 50 to 200MHz in PLL
mode or 0 to 400Mhz in bypass mode. There are two de-jittering
modes available selectable through the HIGH_BW# input pin,
high bandwidth mode provides de-jittering for spread inputs and
low bandwidth mode provides extra de-jittering for non-spread
inputs. The SRC_STOP#, PD#, and OE real-time input pins
provide completely programmable power management control.
Output Features
Funtional Block Diagram
Note: Polarities shown for OE_INV = 0.
IDT
TM
4 - 0.7V HCSL or LVDS differential output pairs
Supports zero delay buffer mode and fanout mode
Bandwidth programming available
/ICS
TM
Four Output Differential Buffer for PCI Express
SRC_IN
SRC_IN#
PD
BYPASS#/PLL
SDATA
SCLK
OE(3:0)
4
CONTROL
LOGIC
COMPATIBLE
SPREAD
PLL
1
Features/Benefits
Key Specifications
M
U
X
Spread spectrum modulation tolerant, 0 to -0.5% down
spread and +/- 0.25% center spread
Supports undriven differential outputs in PD# and
SRC_STOP# modes for power management.
Outputs cycle-cycle jitter: < 50ps
Outputs skew: < 50ps
Extended frequency range in bypass mode:
Revision B: up to 333.33MHz
Revision C: up to 400MHz
Real-time PLL lock detect output pin
28-pin SSOP/TSSOP package
Available in RoHS compliant packaging
LOGIC
STOP
4
IREF
ICS9DB401C
DIF(3:0))
ICS9DB401C
DATASHEET
REV E 03/18/08

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ICS9DB401CGLFT Summary of contents

Page 1

Four Output Differential Buffer for PCI Express Description The 9DB401C is a DB400 Version 2.0 Yellow Cover part with PCI Express support. It can be used embedded systems to provide outputs that have low cycle-to-cycle jitter (50ps), ...

Page 2

ICS9DB401C Four Output Differential Buffer for PCI Express Pin Configuration VDD 1 SRC_IN 2 SRC_IN# 3 GND 4 VDD 5 DIF_1 6 DIF_1# 7 OE_1 8 DIF_2 9 DIF_2# 10 VDD 11 BYPASS#/PLL 12 SCLK 13 SDATA 14 OE_INV = ...

Page 3

ICS9DB401C Four Output Differential Buffer for PCI Express Pin Description for OE_INV = 0 PIN # PIN NAME PIN TYPE 1 VDD PWR 2 SRC_IN IN 3 SRC_IN GND PWR 5 VDD PWR 6 DIF_1 OUT 7 DIF_1# ...

Page 4

ICS9DB401C Four Output Differential Buffer for PCI Express Pin Description for OE_INV = 1 PIN # PIN NAME PIN TYPE 1 VDD PWR 2 SRC_IN IN 3 SRC_IN GND PWR 5 VDD PWR 6 DIF_1 OUT 7 DIF_1# ...

Page 5

ICS9DB401C Four Output Differential Buffer for PCI Express Absolute Max Symbol Parameter VDD_A 3.3V Core Supply Voltage VDD_In 3.3V Logic Supply Voltage V Input Low Voltage IL V Input High Voltage IH Ts Storage Temperature Tambient Ambient Operating Temp Tcase ...

Page 6

ICS9DB401C Four Output Differential Buffer for PCI Express Electrical Characteristics - Clock Input Parameters 70°C; Supply Voltage PARAMETER SYMBOL Differential Input High Voltage V IHDIF Differential Input Low Voltage V ILDIF Input Slew ...

Page 7

ICS9DB401C Four Output Differential Buffer for PCI Express Common Recommendations for Differential Routing L1 length, Route as non-coupled 50 ohm trace. L2 length, Route as non-coupled 50 ohm trace. L3 length, Route as non-coupled 50 ohm trace Down ...

Page 8

ICS9DB401C Four Output Differential Buffer for PCI Express Alternative termination for LVDS and other common differential signals. Vdiff Vp-p Vcm 0.45 v 0.22v 1.08 0.58 0.6 0.28 0.80 0.40 0.6 0.60 0.3 1.2 R1a = R1b = R1 Figure_3. L1 ...

Page 9

ICS9DB401C Four Output Differential Buffer for PCI Express General SMBus serial interface information for the ICS9DB401C How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address DC • ICS clock will acknowledge • ...

Page 10

ICS9DB401C Four Output Differential Buffer for PCI Express SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD) Byte 0 Pin # Name - PD_Mode Bit 7 - STOP_Mode Bit 6 - PD_SRC_INV Bit 5 Bit 4 - Reserved Bit 3 - ...

Page 11

ICS9DB401C Four Output Differential Buffer for PCI Express SMBus Table: Vendor & Revision ID Register Byte 4 Pin # Name Bit 7 - RID3 Bit 6 - RID2 - RID1 Bit 5 - RID0 Bit 4 - VID3 Bit 3 ...

Page 12

ICS9DB401C Four Output Differential Buffer for PCI Express PD# The PD# pin cleanly shuts off all clocks and places the device into a power saving mode. PD# must be asserted before shutting off the input clock or power to insure ...

Page 13

ICS9DB401C Four Output Differential Buffer for PCI Express Note: Polarities in timing diagrams are shown OE_INV = 0. They are similar to OE_INV = 1. SRC_STOP# The SRC_STOP# signal is an active-low asynchronous input that cleanly stops and starts the ...

Page 14

ICS9DB401C Four Output Differential Buffer for PCI Express SRC_STOP_3 (SRC_Stop = Driven Tristate) SRC_Stop# PWRDWN# DIF (Free Running) DIF# (Free Running) DIF (Stoppable) DIF# (Stoppable) SRC_STOP_4 (SRC_Stop = Tristate Tristate) SRC_Stop# PWRDWN# DIF (Free Running) DIF# ...

Page 15

ICS9DB401C Four Output Differential Buffer for PCI Express INDEX INDEX AREA AREA Ordering Information ICS9DB401CFLFT Example: ICS XXXX Four Output Differential Buffer for ...

Page 16

... ICS9DB401C Four Output Differential Buffer for PCI Express INDEX INDEX AREA AREA Ordering Information ICS9DB401CGLFT Example: ICS XXXX Four Output Differential Buffer for PCI Express TM TM IDT /ICS c L SYMBOL VARIATIONS - SEATING SEATING PLANE PLANE Reference Doc.: JEDEC Publication 95, MO-153 aaa ...

Page 17

ICS9DB401C Four Output Differential Buffer for PCI Express Revision History Rev. Issue Date Description 0.1 4/21/2005 Changed Ordering Information from"LN" to "LF". 1. Updated LF Ordering Information to RoHS Compliant. A 8/15/2005 2. Release to web. B 9/7/2006 Updated Electrical ...

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