ICS932S203AGLFT IDT, Integrated Device Technology Inc, ICS932S203AGLFT Datasheet - Page 12

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ICS932S203AGLFT

Manufacturer Part Number
ICS932S203AGLFT
Description
IC FREQ GEN W/CPU CLOCK 56-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Frequency Generatorr
Datasheet

Specifications of ICS932S203AGLFT

Input
Crystal
Output
Clock
Frequency - Max
133.3MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
133.3MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
932S203AGLFT
Notes:
1.
2.
3.
4.
5.
6.
IDT
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends a dummy command code
• ICS clock will acknowledge
• Controller (host) sends a dummy byte count
• ICS clock will acknowledge
• Controller (host) starts sending first byte (Byte 0)
• ICS clock will acknowledge each byte one at a time.
• Controller (host) sends a Stop bit
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
TM
through byte 5
Frequency Generator with 133MHz Differential CPU Clocks
The ICS clock generator is a slave/receiver, SMBus component. It can read back the data stored in the latches for
verification. Read-Back will support Intel PIIX4 "Block-Read" protocol.
The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode)
The input is operating at 3.3V logic levels.
The data byte format is 8 bit bytes.
To simplify the clock generator SMBus interface, the protocol is set to use only "Block-Writes" from the controller. The
bytes must be accessed in sequential order from lowest to highest byte with the ability to stop after any complete byte
has been transferred. The Command code and Byte count shown above must be sent, but the data is ignored for those
two bytes. The data is loaded until a Stop sequence is issued.
At power-on, all registers are set to a default condition, as shown.
Dummy Command Code
Dummy Byte Count
Controller (Host)
Address
Start Bit
Stop Bit
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
D2
(H )
The information in this section assumes familiarity with SMBus programming.
How to Write:
General SMBus serial interface information
For more information, contact ICS for an SMBus software program.
ICS (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
(H)
12
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the read address D3
• ICS clock will acknowledge
• ICS clock will send the byte count
• Controller (host) acknowledges
• ICS clock sends first byte (Byte 0) through byte 6
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a stop bit
Controller (Host)
Address
Start Bit
Stop Bit
D3
ACK
ACK
ACK
ACK
ACK
ACK
ACK
ACK
(H )
How to Read:
ICS (Slave/Receiver)
Byte Count
Byte 0
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
ACK
0601G—01/26/10
(H)

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