ICS932S203AGLFT IDT, Integrated Device Technology Inc, ICS932S203AGLFT Datasheet - Page 14

• Manufacturer Part Number: ICS932S203AGLFT
• Description: IC FREQ GEN W/CPU CLOCK 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS932S203AGLFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 133.3MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 133.3MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 932S203AGLFT

IDT
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
PCI_STOP# - Assertion (transition from logic "1" to logic "0")
TM
The impact of asserting the PCI_STOP# signal will be the following. All PCI[6:0] and stoppable PCI_F[2,0] clocks will latch low
in their next high to low transition.
PCICLK_F (2:0) PCICLK (6:0)
All 3V66 clocks are to be in pphase with each other. In the case where 3V66_1 is configured as 48MHz VCH clock, there is no
defined phase relationship between 3V66_1/VCH and other 3V66 clocks. The PCI group should lag 3V66 by the standard
skew described below as Tpci.
3V66
PCI
3V66 to PCI
1
Group Skews at Common Transition Edges: (Un-Buffered Mode)
Guaranteed by design, not 100% tested in production.
Frequency Generator with 133MHz Differential CPU Clocks
GROUP
PCI_F[2:0] 33MHz
PCI[6:0] 33MHz
3V66 (1:0)
3V66 (4:2)
PCI_STOP#
3V66_5
SYMBOL
S
3V66
3V66-PCI
PCI
Un-Buffered Mode 3V66 & PCI Phase Relationship
3V66 (5:0) pin to pin skew
PCI_F (2:0) and PCI (6:0) pin to pin skew
3V66 (5:0) leads 33MHz PCI
Tpci
Assertion of PCI_STOP# Waveforms
CONDITIONS
14
MIN
1.5
0
0
TYP
MAX UNITS
500
500
3.5
ps
ps
ns
0601G—01/26/10