ICS932S203AGLFT IDT, Integrated Device Technology Inc, ICS932S203AGLFT Datasheet - Page 4

• Manufacturer Part Number: ICS932S203AGLFT
• Description: IC FREQ GEN W/CPU CLOCK 56-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS932S203AGLFT

• Input: Crystal
• Output: Clock
• Frequency - Max: 133.3MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Frequency-max: 133.3MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 932S203AGLFT

Byte 0: Control Register
Byte 1: Control Register
Notes:
1. R= Read only RW= Read and Write
2. PWD = Power on Default
3. The purpose of this bit is to allow a system designer to implement PCI_STOP functionality in one of two ways. Wither the
IDT
ICS932S203
Frequency Generator with 133MHz Differential CPU Clocks
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system designer can choose to use the externally provided PCI_STOP# pin to assert and de-assert PCI_STOP
functionality via SMBus Byte 0 Bit 3.
In Hardware mode it is not allowed to write to the SMBus Byte 0 Bit3. In Software mode it is not allowed to pull the
external PCI_STOP pin low. This avoids the issues related with Hardware started and software stopped PCI_STOP
conditions. The clock chip is to be operated in the Hardware or Software PCI_STOP mode ONLY, it is not allowed to mix
these modes.
In Hardware mode the SMBus byte 0 Bit 3 is R/W and should reflect the status of the part. Whether or not the chip is in
PCI_STOP mode.
Functionality PCI_STOP mode should be entered when [(PCI_STOP#=0) or (SMBus Byte 0 Bit 3 = 0)].
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Frequency Generator with 133MHz Differential CPU Clocks
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