DS0026CJ National Semiconductor, DS0026CJ Datasheet - Page 6

• Manufacturer Part Number: DS0026CJ
• Description: IC CLOCK DRIVER DUAL 5MHZ 14CDIP
• Manufacturer: National Semiconductor
• Type: Fanout Buffer (Distribution)r

Specifications of DS0026CJ

• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Input: TTL
• Output: MOS
• Frequency - Max: 10MHz
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 14-CDIP (0.300", 7.62mm)
• Frequency-max: 10MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Voltage - Supply: -
• Other names: *DS0026CJ

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Typical Applications
Application Hints
DRIVING THE MM5262 WITH THE
DS0026 CLOCK DRIVER
The clock signals for the MM5262 have three requirements
which have the potential of generating problems for the user.
These requirements, high speed, large voltage swing and
large capacitive loads, combine to provide ample opportunity
for inductive ringing on clock lines, coupling clock signals to
other clocks and/or inputs and outputs and generating noise
on the power supplies. All of these problems have the poten-
tial of causing the memory system to malfunction. Recogniz-
ing the source and potential of these problems early in the
design of a memory system is the most critical step. The ob-
DC Coupled RAM Memory Address or Precharge
AC Coupled MOS Clock Driver
Driver (Positive Supply Only)
5853 Version 6 Revision 3
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FIGURE 2.
Print Date/Time: 2010/07/13 22:49:07
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6
ject here is to point out the source of these problems and give
a quantitative feel for their magnitude.
Line ringing comes from the fact that at a high enough fre-
quency any line must be considered as a transmission line
with distributed inductance and capacitance. To see how
much ringing can be tolerated we must examine the clock
voltage specification.
in diagram form, with idealized ringing sketched in. The ring-
ing of the clock about the V
V
stored in the memory could be altered. Referring to
1, if the threshold voltage of a transistor were −1.3V, the clock
going to V
are tied to that clock, would be only 300 mV from turning on.
The internal circuitry needs this noise margin and from the
functional description of the RAM it is easy to see that turning
a clock on at the wrong time can have disastrous results.
Controlling the clock ringing is particularly difficult because of
the relative magnitude of the allowable ringing, compared to
magnitude of the transition. In this case it is 1V out of 20V or
only 5%. Ringing can be controlled by damping the clock driv-
er and minimizing the line inductance.
Damping the clock driver by placing a resistance in series with
its output is effective, but there is a limit since it also slows
down the rise and fall time of the clock signal. Because the
typical clock driver can be much faster than the worst case
driver, the damping resistor serves the useful function of lim-
iting the minimum rise and fall time. This is very important
because the faster the rise and fall times, the worse the ring-
ing problem becomes. The size of the damping resistor varies
because it is dependent on the details of the actual applica-
tion. It must be determined empirically. In practice a resis-
tance of 10Ω to 20Ω is usually optimum.
SS
− 1 V
SS
OH
− 1 would mean that all the devices, whose gates
is not maintained, at all times, the information
FIGURE 3. Clock Waveform
Figure 3
SS
level is particularly critical. If the
shows the clock specification,
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Figure
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