LMX2541SQE2060E/NOPB National Semiconductor, LMX2541SQE2060E/NOPB Datasheet

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... Device LMX2541SQ2060E LMX2541SQ2380E LMX2541SQ2690E LMX2541SQ3030E LMX2541SQ3320E LMX2541SQ3740E System Diagram © 2010 National Semiconductor Corporation LMX2541 Features ■ Very Low RMS Noise and Spurs — -225 dBc/Hz Normalized PLL Phase Noise — Integrated RMS Noise (100 MHz) ■ ■ ■ ...

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LMX2541 Frequency Coverage 2060E VCO _DIV Start Stop Start 1 1990.0 2240.0 2200.0 2 995.0 1120.0 1100.0 3 663.3 746.7 733.3 4 497.5 560.0 550.0 5 398.0 448.0 440.0 6 331.7 373.3 366.7 7 284.3 320.0 314.3 8 248.8 275.0 ...

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Functional Block Diagram Connection Diagram 36-Pin SQ Package (Top View) 3 30073301 30073302 www.national.com ...

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Pin Descriptions Pin # Name Type 0 GND GND 1 GND GND 2 VregRFout LDO Output Supply 3 VccRFout (LDO Input Lmid Supply 7 VccVCO (LDO Input) 8 VregVCO LDO Output 9 ...

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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Parameter Power Supply Voltage Input Voltage to pins other than Vcc Pins (Note 4) Storage Temperature Range Lead Temperature (solder 4 sec.) Recommended Operating Conditions ...

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Electrical Characteristics at Vcc = 3 C.) Symbol Parameter Entire Chip Supply Current with I CC all blocks enabled I Current for External VCO Mode PLL I Current for Divider Only Mode DIV I PD Power Down Current ...

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Symbol Parameter PLL Input Sensitivity p ((Note 7) applies to Max Limit ExtVCOin Only) f Internal VCO Frequency Range VCO Maximum Allowable ΔT Temperature Drift for CL Continuous Lock RF Output Power p RFout (Note 6) ΔP Change in Output ...

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Symbol Parameter Phase Noise L(f) Fout 2060E Phase Noise L(f) Fout 2380E Phase Noise L(f) Fout 2690E Phase Noise L(f) Fout 3030E www.national.com Conditions VCO Phase Noise (Note 10) 10 kHz Offset 100 kHz Offset f = RFout 1 MHz ...

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Symbol Parameter Phase Noise L(f) Fout 3320E Phase Noise L(f) Fout 3740E Conditions 10 kHz Offset 100 kHz Offset f = RFout Min VCO 1 MHz Offset Frequency 10 MHz Offset 20 MHz Offset 10 kHz Offset 100 kHz Offset ...

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Symbol Parameter Digital Interface (DATA, CLK, LE, CE, Ftest/LD, FLout,RFoutEN) V High-Level Input Voltage IH V Low-Level Input Voltage IL I High-Level Input Current IH I Low-Level Input Current IL V High-Level Output Voltage OH V Low-Level Output Voltage OL ...

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Serial Data Timing Diagram There are several other considerations for programming: • The DATA is clocked into a shift register on each rising edge of the CLK signal. On the rising edge of the LE signal, the data is sent ...

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Typical Performance Characteristics (Not Guaranteed) The above plot demonstrates the PLL phase noise of the LMX2541SQ3700E operating at 3700 MHz output frequency, phase detector frequency of 100 MHz, and charge pump gain of 32X. The loop bandwidth was made as ...

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For this plot, a third order modulator with dithering disabled was used with a fractional denominator of 500000. The charge pump gain was 32X and the loop filter components were C1 = 2 ...

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When the divider is engaged (VCO_DIV >0), then the entire system phase noise is reduced by a factor of 20 × log(VCO_DIV). However, the noise floor of the divider will also add to this noise as is visible at far ...

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PLL Normalized Noise Floor vs. OSCin Slew Rate (K = 32X) PD PLL Normalized Noise Floor vs. Charge Pump Gain (Slew Rate = 2000 V/μs) PLL Normalized 1/f Noise vs. OSCin Slew Rate 30073308 PLL Normalized 1/f Noise vs. Charge ...

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VCO Phase Noise Degradation vs. Temperature and Offset The above plot shows how much the VCO phase noise typically change over temperature relative to room temperature. The typical values for represent an average over all frequencies and part options and ...

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Output Power vs. Voltage (VCO_DIV = 1, VCOGAIN = 12, OUTTERM = 12 25°C A (Note 6)) Output Power vs. OUTTERM and FREQUENCY (VCO_DIV = °C, Vcc = 3.3 V, VCOGAIN = 12 A ...

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Output Power vs. Voltage (VCO_DIV > 1, DIVGAIN = 12, OUTTERM = 12 25°C A (Note 6) ) Output Power vs. OUTTERM and FREQUENCY (VCO_DIV > °C, Vcc = 3.3 V, DIVGAIN = 12 ...

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The impedance of the RFout pin varies as a function of frequency, VCO_DIV, OUTTERM, VCOGAIN, DIVGAIN, and frequency. When in bypass mode (VCO_DIV = 1), the DIVGAIN word has no impact on the output impedance. When in divided mode (VCO_DIV>1), ...

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RFout Output Impedance vs. VCOGAIN (Bypass Mode) This is for the VCO divider in bypass mode (VCO_DIV=1) and the RFout pin powered up. OUTTERM was set to 12. VCOGAIN=3 Freq. (MHz) Real Imaginary 50 3.8 2.1 100 4.8 4.1 200 ...

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RFout Output Impedance vs. OUTTERM (Bypass Mode) The VCO divider was bypassed (VCO_DIV = 1) and the RFout pin was enabled. The VCOGAIN word was set to 12. OUTTERM=3 Freq. (MHz) Real Imaginary 50 27.9 1.6 100 28.5 2.8 200 ...

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RFout Output Impedance vs. DIVGAIN (Divided Mode) This was done with RFout buffer powered up and with OUTTERM=12. VCO_DIV was set to 50. DIVGAIN=3 Freq. (MHz) Real Imaginary 50 3.2 2.2 100 4.5 4.1 200 5.7 5.3 400 5.0 9.2 ...

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RFout Output Impedance vs. OUTTERM (Divided Mode) This was done in divided mode (VCO_DIV=50) with VCOGAIN=12. OUTTERM=3 Freq.(MHz) Real Imaginary 50 44.1 -0.3 100 44.9 -2.2 200 43.2 -7.2 400 33.2 -8.1 600 28.0 -3.8 800 25.1 1.1 1000 23.7 ...

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The above chart shows the typical sensitivity for a sine wave. Note that at lower frequencies, there is a constant slope that suggests that the part fails when the slew rate falls below 27 V/us. The electrical specifications call for ...

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OSCin (Normal Mode) Frequency Real Imaginary (MHz) 1 3945.3 2261.6 5 4846.0 10 4253.4 -1850.1 20 2295.3 -2366.9 30 1290.0 -2087.0 40 847.9 -1716.1 50 581.3 -1464.9 60 439.2 -1254.1 70 337.9 -1105.7 80 269.4 90 223.4 100 179.2 200 ...

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Frequency 100 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 3200 3400 3600 3800 4000 4200 4400 4600 4800 5000 6000 7000 www.national.com ExtVCOin Input Impedance Real 627.9 193.8 56.4 31.3 23.2 17.8 ...

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Bench Test Setups CHARGE PUMP CURRENTS TEST SETUP The charge pump is tested in external VCO mode (MODE=1), although external VCO hooked up. The CPout pin should be disconnected from the any external VCO tuning pin, external ...

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Charge Pump Current Definitions I1 = Charge Pump Sink Current Charge Pump Sink Current Charge Pump Sink Current Charge Pump Source Current at V Variation of Charge Pump ...

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RFout OUTPUT POWER TEST SETUP (Note 6) The output power is tested by programming the VCO output to a desired frequency and measuring with a spectrum ana- lyzer pad is used and this gain as well as ...

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PHASE NOISE MEASUREMENT TEST SETUP The basic setup technique for all noise tests is to measure the noise at the output of the RFout pin in Internal VCO Mode (MODE=0) with a phase noise analyzer. For all measure- ments, the ...

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INPUT AND OUTPUT IMPEDANCE TEST SETUP A network analyzer can be used to measure the input impedance of the OSCin and ExtVCOin pin as well as the output impedance of the RFout pin. The general technique is to connect the ...

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ExtVCOin (NOT OSCin) INPUT SENSITIVITY TEST SETUP In order to measure the ExtVCOin Input sensitivity, the part is put in External VCO mode and a signal is applied to the ExtV- COin pin. A matching network, which is typically a ...

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OSCin INPUT SENSITIVITY TEST SETUP Input Sensitivity Test Procedure There are two things that are important to consider when measuring the OSCin sensitivity. • The action of setting the Ftest/LD pin to monitor the R divider output degrades the OSCin ...

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Functional Description The LMX2541 is a low power, high performance frequency synthesizer system which includes a PLL, Partially Integrated Loop Filter, VCO, VCO Divider, and Programmable Output Buffer. There are three basic modes that the device can be configured ...

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OSC_FREQ word is set correctly to have this work cor- rectly. The VCO also has an internal amplitude calibration algorithm to optimize the phase noise which is also activated any time the R0 register is programmed. The optimum internal ...

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Parameter Symbol Charge pump Typically choose to be the FL_CPG gain in Fastlock Loop Bandwidth K Multiplier Internal Loop FL_R3_LF Filter Resistor Internal Loop FL_R4_LF Filter Resistor External Loop R2pLF Filter Resistor 1.11 LOCK DETECT The Ftest/LD pin of the ...

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General Programming Information The LMX2541 is programmed using several 32-bit registers used to control the LMX2541 operation. A 32-bit shift register is used as a temporary register to indirectly program the on-chip registers. The shift register consists of a ...

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www.national.com 38 ...

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REGISTER R7 Although Register 7 has no elective bits to program very important to program this register because the action of doing so with the bit sequence shown in the register map resets all the registers, including ...

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REGISTER R6 Register R6 has words that impact the output power of the RFout pin. RFOUT[1:0] - RFout enable pin This word works in combination with the EN_RFout Pin to control the state of the RFout pin. RFOUT 0 ...

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FL_R3_LF[2:0] -- Value for Internal Loop Filter Resistor R3 During Fastlock FL_R3_LF Value FL_R4_LF[2:0] -- Value for Internal Loop Filter Resistor R4 During Fastlock FL_R4_LF Value FL_CPG[4:0] -- Charge Pump Current for Fastlock When FastLock is enabled, this is the ...

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REGISTER R4 This register controls miscellaneous functions of the device. The action of programming the R4 register also synchronizes the VCO divider, which is necessary when VCO_DIV = OSC_FREQ [7:0] -- OSCin Frequency for VCO Calibration ...

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R4_LF Value C3_LF[3:0] -- VALUE FOR C3 IN THE INTERNAL LOOP FILTER This word controls the state of the internal loop filter resistor C3_LF when the device is Full Chip Mode. C4_LF[3:0] -- VALUE FOR C4 IN THE INTERNAL LOOP ...

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REGISTER R3 This register controls miscellaneous features of the device. MODE[1:0] -- Operational Mode The LMX2541 can be run in several operational modes as listed in the table below: MODE 0 1 External VCO 2 Divider Only 3 Test ...

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MUX[3:0] -- Multiplexed Output for Ftest/LD Pin The MUX[3:0] word is used to program the output of the Ftest/LD Pin. This pin can be used for a general purpose I/O pin, a lock detect pin, and for diagnostic purposes. When ...

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ORDER[2:0] -- Delta Sigma Modulator Order This word determines the order of the delta sigma modulator in the PLL. In general, higher order fractional modulators tend to reduce the primary fractional spurs that occur at increments of the channel spacing, ...

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There are restrictions when using digital lock detect, based on the phase detector frequency (f VCO frequency (f ). The first restriction involves a minimum window size (ε VCO size (ε ), and the third involves further restrictions on the ...

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In the previous table, consider the case of operating in integer mode with ORDER=0. For this case, lock detect can theoretically work for all VCO frequencies provided that the phase detector frequency does not violate the maximum possible value. For ...

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REGISTERS R1 AND R0 Both registers R1 and R0 contain information for the PLL R counter, N counter, and fractional numerator. The action of programming register R0, even to the same value, runs the VCO calibration when the device ...

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Applications Information 3.1 TYPICAL CONNECTIONS www.national.com Full Chip Mode, Differential OSCin 50 30073336 ...

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External VCO Mode, Single-Ended OSCin, RFout Pin not Used For both of the able connection diagrams, L1, L2, and Lmid should be left open, but the pads should be placed on these pins for optimal solderability. The GND pins should ...

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Single-Ended Operation For differential operation the case when using an LVDS or LVPECL driver, a 100 Ω resistor is placed across the OS- Cin/OSCin* traces Differential Operation A third way to configure the device is in crystal mode ...

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Sub-Fractional Spur Offset Frequencies vs. Modulator Order and Fractional Denominator Factors Fractional Denominator Factors ORDER No Factor Factor of Factor but not 3 3 but not 2 Integer None None Mode 1st Order None ...

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IMPACT OF MODULATOR ORDER, DITHERING, AND LARGER EQUIVALENT FRACTIONS ON SPURS AND PHASE NOISE To achieve a fractional N value, an integer N divider is mod- ulated between different values. This gives rise to three main degrees of freedom ...

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CHANGE in Current Consumption in Bypass Mode as a Function of VCOGAIN and OUTTERM VCOGAIN -26.0 -22.3 -18 -18.5 -15.5 -12.6 9 -11.1 -9.0 -6.9 12 -3.8 -2.6 -1.4 15 +3.3 +3.7 +4.0 CHANGE in ...

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For example, consider the LMX2541SQ3320E changing from 3600 to 3400 with an OSCin frequency of 100 MHz. In this case, ΔF = 200 (direction of frequency change does not mat- ter 100 MHz, and OSC_FREQ=100. The calibration OSCin ...

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Ordering Information Device VCO Range LMX2541SQ2060E 1990 - 2240 MHz LMX2541SQ2380E 2200 - 2530 MHz LMX2541SQ2690E 2490 - 2865 MHz LMX2541SQ3030E 2810 - 3230 MHz LMX2541SQ3320E 3130 - 3600 MHz LMX2541SQ3740E 3480 - 4000 MHz Part Marking Order Number LMX2541SQE2060E ...

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Physical Dimensions Consult www.national.com/analog/packaging ->LLP footprints in gerber footprint for more complete information on soldering this device reliably. For reasons of performance and heat dissipation, it sometimes makes sense to put more vias than recommended by these guidelines, but they ...

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Notes 59 www.national.com ...

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