SI5367B-B-GQ Silicon Laboratories Inc, SI5367B-B-GQ Datasheet - Page 3

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SI5367B-B-GQ

Manufacturer Part Number
SI5367B-B-GQ
Description
IC UP-PROG CLK MULTIPLR 100TQFP
Manufacturer
Silicon Laboratories Inc
Type
Clock Multiplierr
Datasheets

Specifications of SI5367B-B-GQ

Package / Case
100-TQFP, 100-VQFP
Pll
Yes with Bypass
Input
Clock
Output
CML, CMOS, LVDS, LVPECL
Number Of Circuits
1
Ratio - Input:output
4:5
Differential - Input:output
Yes/Yes
Frequency - Max
808MHz
Divider/multiplier
No/Yes
Voltage - Supply
1.62 V ~ 2.75 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
808MHz
Mounting Style
SMD/SMT
Number Of Outputs
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI5367B-B-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Table 1. Performance Specifications (Continued)
(V
Table 2. Absolute Maximum Ratings
Rise/Fall Time
Duty Cycle
PLL Performance
Jitter Generation
Jitter Transfer
Phase Noise
Subharmonic Noise
Spurious Noise
Package
Thermal Resistance
Junction to Ambient
Note: For a more comprehensive listing of device specifications, please consult the Silicon Laboratories Any-Rate Precision
DC Supply Voltage
LVCMOS Input Voltage
Operating Junction Temperature
Storage Temperature Range
ESD HBM Tolerance (100 pF, 1.5 kΩ)
ESD MM Tolerance
Latch-Up Tolerance
Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be
DD
= 1.8 or 2.5 V ±10%, T
Clock Family Reference Manual. This document can be downloaded from www.silabs.com/timing.
restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods of time may affect device reliability.
Parameter
Parameter
A
= –40 to 85 ºC)
CKO
Symbol
SP
SP
CKO
CKO
J
J
θ
GEN
SUBH
SPUR
PK
JA
TRF
DC
PN
Phase Noise @ 100 kHz Offset
(n > 1, n x F3 < 100 MHz)
LVPECL output format
f
f
Max spur @ n x F3
OUT
OUT
50 kHz–80 MHz
12 kHz–20 MHz
800 Hz–80 MHz
Test Condition
100 kHz offset
100 Hz offset
10 kHz offset
Preliminary Rev. 0.3
1 MHz offset
1 kHz offset
= 622.08 MHz,
= 622.08 MHz
20–80%
Still Air
Symbol
T
V
T
V
STG
JCT
DIG
DD
Min
45
–0.3 to (V
–0.5 to 2.75
–55 to 150
–55 to 150
Value
JESD78 Compliant
200
2
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
0.05
DD
Typ
230
0.6
0.6
40
+ 0.3)
Max
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
350
0.1
Si5367
55
Unit
ºC
ºC
kV
V
V
V
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps rms
ps rms
ps rms
ºC/W
Unit
dBc
dBc
dB
ps
%
3

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