MC145170D2R2 Freescale Semiconductor, MC145170D2R2 Datasheet - Page 18

• Manufacturer Part Number: MC145170D2R2
• Description: IC SERIAL PLL FREQ SYNTH 16-SOIC
• Manufacturer: Freescale Semiconductor
• Type: Clock/Frequency Synthesizer, Fanout Distributionr

Specifications of MC145170D2R2

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 185MHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Frequency-max: 185MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: MC145170D2TR

Design Considerations
4 Design Considerations
4.1 Crystal Oscillator Considerations
The following options may be considered to provide a reference frequency to Motorola's CMOS frequency
synthesizers.
4.1.1 Use of a Hybrid Crystal Oscillator
Commercially available temperature-compensated crystal oscillators (TCXOs) or crystal-controlled data
clock oscillators provide very stable reference frequencies. An oscillator capable of CMOS logic levels at
the output may be direct or dc coupled to OSC
outputs, capacitive or ac coupling to OSC
For additional information about TCXOs, visit motorola.com on the world wide web.
4.1.2 Use of the On-Chip Oscillator Circuitry
The on-chip amplifier (a digital inverter) along with an appropriate crystal may be used to provide a
reference source frequency. A fundamental mode crystal, parallel resonant at the desired operating
frequency, should be connected as shown in Figure 20.
The crystal should be specified for a loading capacitance (C
at the highest operating frequencies listed in Table 6, Loop Specifications. Larger C
for lower frequencies. Assuming R1 = 0 , the shunt load capacitance (C
can be estimated to be:
where
The oscillator can be “trimmed” on-frequency by making a portion or all of C1 variable. The crystal and
associated components must be located as close as possible to the OSC
distortion, stray capacitance, stray inductance, and startup stabilization time. Circuit stray capacitance can
also be handled by adding the appropriate stray value to the values for C
term C
A good design practice is to pick a small value for C1, such as 5 to 10 pF. Next, C2 is calculated. C1 < C2
results in a more robust circuit for start-up and is more tolerant of crystal parameter variations.
Power is dissipated in the effective series resistance of the crystal, R
level specified by the crystal manufacturer represents the maximum stress that the crystal can withstand
without damage or excessive shift in operating frequency. R1 in Figure 20. limits the drive level. The use
of R1 is not necessary in most cases.
18
stray
C
C
C
C1 and C2 = external capacitors (see Figure 21)
C
capacitance appearing across the crystal
terminals
in
out
a
stray
= 1.0 pF (see Figure 21)
becomes 0 in the above expression for C
C L
= 5.0 pF (see Figure 21)
= 6.0 pF (see Figure 21)
= the total equivalent external circuit stray
=
-----------------------------
C in
C
in
+
C
C out
out
Freescale Semiconductor, Inc.
+
C a
For More Information On This Product,
+
C stray
MC145170-2 Technical Data
Go to: www.freescale.com
in
+
C1
--------------------- -
C1
may be used (see Figures 9 and 10).
in
+
¥
. If the oscillator does not have CMOS logic levels on the
C2
C2
L
.
L
) which does not exceed 20 pF when used
e
, in Figure 22. The maximum drive
in
in
and OSC
L
and C
) presented across the crystal
out
out
. For this approach, the
L
pins to minimize
values are possible
MOTOROLA