M48T02-150PC1 STMicroelectronics, M48T02-150PC1 Datasheet - Page 3

• Manufacturer Part Number: M48T02-150PC1
• Description: IC TIMEKPR NVRAM 16KBIT 5V 24-DI
• Manufacturer: STMicroelectronics
• Series: Timekeeper®r
• Type: Clock/Calendar/NVSRAMr

Specifications of M48T02-150PC1

• Memory Size: 16K (2K x 8)
• Time Format: HH:MM:SS (24 hr)
• Date Format: YY-MM-DD-dd
• Interface: Parallel
• Voltage - Supply: 4.75 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (600 mil) Module
• Function: Clock/Calendar/NV Timekeeping RAM/Battery Backup
• Rtc Memory Size: 2048 Byte
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.75 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Rtc Bus Interface: Parallel
• Capacitance, Input: 10 pF
• Capacitance, Output: 10 pF
• Current, Input, Leakage: ±1 μA
• Current, Operating: 80 mA
• Current, Output, Leakage: ±1
• Data Retention: 10 yrs.
• Density: 16K
• Memory Type: Non-Volatile SRAM
• Organization: 2K×8
• Package Type: PCDIP24
• Power Dissipation: 1 W
• Temperature, Operating: 0 to +70 °C
• Time, Access: 150 ns
• Time, Fall: ≤5 ns
• Time, Rise: ≤5 ns
• Voltage, Input, High: 5.05 to 5.8 V
• Voltage, Input, Low: 0.8 V
• Voltage, Output, High: 2.4 V
• Voltage, Output, Low: 0.4 V
• Voltage, Supply: 4.75 to 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-2825-5

Operation modes
Figure 4.
Note:
Table 3.
1. Valid for ambient operating temperature: T
8/25
Symbol
t
t
t
t
t
t
t
t
t
GHQZ
GLQV
GLQX
EHQZ
AXQX
AVQV
ELQV
ELQX
AVAV
A0-A10
E
G
DQ0-DQ7
The state of the eight three-state data I/O signals is controlled by E and G. If the outputs are
activated before t
the address inputs are changed while E and G remain active, output data will remain valid
for output data hold time (t
Read mode AC waveforms
WRITE enable (W) = High.
Read mode AC characteristics
READ cycle time
Address valid to output valid
Chip enable low to output valid
Output enable low to output valid
Chip enable low to output transition
Output enable low to output transition
Chip enable high to output Hi-Z
Output enable high to output Hi-Z
Address transition to output transition
Parameter
AVQV
, the data lines will be driven to an indeterminate state until t
A
tAVQV
tELQX
= 0 to 70°C; V
AXQX
(1)
tGLQX
tELQV
tGLQV
) but will go indeterminate until the next address access.
CC
tAVAV
VALID
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where noted).
Min
70
10
5
5
–70
Max
70
70
35
25
25
VALID
M48T02/M48T12
Min
150
10
5
5
tGHQZ
–150
Max
150
150
75
35
35
Min
200
M48T02, M48T12
10
5
5
tAXQX
tEHQZ
–200
AI01330
Max
200
200
80
40
40
AVQV
Unit
. If
ns
ns
ns
ns
ns
ns
ns
ns
ns