DS1501YZ+ Maxim Integrated Products, DS1501YZ+ Datasheet - Page 12

IC RTC WDOG Y2KC 5.0V 28-SOIC

DS1501YZ+

Manufacturer Part Number
DS1501YZ+
Description
IC RTC WDOG Y2KC 5.0V 28-SOIC
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/WDT/NVSRAM/Y2Kr
Datasheet

Specifications of DS1501YZ+

Memory Size
2K (256 x 8)
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DATA RETENTION MODE
The DS1501/DS1511 are fully accessible, and data can be written and read only when V
However, when V
registers and SRAM are blocked from any access. While in the data retention mode, all inputs are don’t cares and
outputs go to a high-Z state, with the possible exception of KS, PWR, SQW, and RST. If V
V
greater than V
below the larger of V
returned to nominal levels (Table 1). If the square-wave and battery-backup 32kHz functions are enabled, V
always provides power for the square-wave output, when the device is in battery-backup mode.
AUXILIARY BATTERY
The V
wave output features in the absence of V
when V
This auxiliary battery can be used as the primary backup power source for maintaining the clock/calendar and
external user RAM. This occurs if the V
backed up using a single battery with the auxiliary features enabled, then V
grounded (DS1501). If V
OSCILLATOR CONTROL BIT
When the DS1511 is shipped from the factory, the internal oscillator is turned off. This feature prevents the lithium
energy cell from being used until it is installed in a system. The oscillator is automatically enabled when power is
first applied.
POWER-ON RESET
A temperature-compensated comparator circuit monitors the level of V
the RST signal (open drain) is pulled low. When V
low for a period of t
whether or not the oscillator is enabled.
TIME AND DATE OPERATION
The time and date information is obtained by reading the appropriate register bytes. Table 2 shows the RTC
registers. The time and date are set or initialized by writing the appropriate register bytes. The contents of the time
and date registers are in BCD format. Hours are in 24-hour mode. The day-of-week register increments at
midnight. Values that correspond to the day of week are user defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical time and date entries result in undefined operation.
READING THE CLOCK
When reading the clock and calendar data, it is possible to access the registers while an update (once per second)
occurs. There are three ways to avoid using invalid time and date data.
The first method uses the transfer enable (TE) bit in the control B register. Transfers are halted when a 0 is written
to the TE bit. Setting TE to 0 halts updates to the user-accessible registers, while allowing the internal registers to
advance. After the registers are read, the TE bit should be written to 1. TE must be kept at 1 for at least 366μs to
ensure a user register update.
The time and date registers can be read and stored in temporary variables. The time and date registers are then
read again, and compared to the first values. If the values do not match, the time and date registers should be read
a third time and compared to the previous values. This should be done until two consecutive reads of the time and
date registers match. The TE bit should always be enabled when using this method for reading the time and date,.
BAUX
, the device power is switched from V
BAUX
CC
is not applied to the device.
input is provided to supply power from an auxiliary battery for the DS1501/DS1511 kickstart and square-
BAT
and V
CC
REC
falls below the power-fail point V
BAT
. The power-on reset function is independent of the RTC oscillator and therefore operational
BAUX
BAUX
and V
, the device power is switched from V
is not to be used, it must be grounded.
BAUX
. RTC operation and SRAM data are maintained from the battery until V
BAT
CC
CC
pin is at a lower voltage than V
. This power source must be available to use these auxiliary features
to the greater of V
CC
returns to nominal levels, the RST signal continues to be pulled
12 of 22
PF
(point at which write protection occurs) the internal clock
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks
BAT
CC
to the larger of V
and V
CC
. When V
BAUX
BAUX
BAUX
when V
should be used and V
. If the DS1501/DS1511 are to be
CC
falls to the power-fail trip point,
BAT
CC
and V
drops below V
PF
CC
is less than V
BAUX
is greater than V
when V
BAT
PF
should be
. If V
CC
BAT
drops
CC
PF
BAUX
and
PF
is
is
.

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