MAXQ3183-RAN+ Maxim Integrated Products, MAXQ3183-RAN+ Datasheet - Page 32

• Manufacturer Part Number: MAXQ3183-RAN+
• Description: IC AFE POLYPHASE MULTI 28TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAXQ3183-RAN+

• Number Of Channels: 8
• Power (watts): 140mW
• Voltage - Supply, Analog: 3.6V
• Voltage - Supply, Digital: 3.6V
• Package / Case: 28-TSSOP
• For Use With: MAXQ3183-KIT - KIT EV REFRNC DSIGN FOR MAXQ3183
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Bits: -
• Other names: 90-M3183+RAN

Low-Power, Multifunction, Polyphase AFE
with Harmonics and Tamper Detect
The interrupt request flag register contains bits that indicate the reason the IRQ pin has become active. The active
bit must be cleared by the host to avoid continuing firing of the interrupt by the MAXQ3183.
32
Bit:
Name:
Reset:
Bit:
Name:
Reset:
BIT
7:4
15
14
13
12
11
10
______________________________________________________________________________________
9
8
3
2
1
0
ISUMOVF
DSPRDY
CHSCH
DSPOR
NAME
DCHR
DCHA
NOZX
PWRF
EOVF
OC
UV
OV
—
DSPOR
15
—
0
7
0
When set, the DSP was unable to complete processing one cycle when another cycle was due to
begin. This indicates that the R_ADCRATE is set too low, and that samples are arriving more quickly
than they can be processed. Either increase the value of the R_ADCRATE register or set the DFUN bit
in the OPMODE2 register to disable fundamental frequency calculations to reduce the load on the DSP.
Set when the DSP cycle completes.
When set, the direction of reactive energy flow has changed (that is, from capacitive to inductive or
from inductive to capacitive).
When set, the direction of real energy flow has changed (that is, from toward the load to away from the
load, or from away from the load to toward the load).
When set, the MAXQ3183 has failed to detect zero crossings on one or more voltage channels in one
complete DSP cycle.
When set, the absolute instantaneous voltage level in one or more voltage channels failed to exceed
the trip level set in the UVLVL (Undervoltage Level) register for one DSP cycle.
When set, the absolute instantaneous voltage level in one or more voltage channels has exceeded the
trip level set in the OVLVL (Overvoltage Level) register.
When set, the absolute instantaneous current in one or more current channels has exceeded the trip
level set in the OCLVL (Overcurrent Level) register.
Reserved.
When set, the vector sum of currents (3 or 4) exceeds the threshold.
When set, one or more energy accumulators have an MSB overflow condition.
When set, indicates a change of the CHKSUM. The CHKSUM is computed over the configuration and
calibration data. The host should review a change in CHKSUM because any change in the
configuration or calibration data affects the metering operation and accuracy.
When set, a power-supply failure is imminent and the supervisory processor should begin taking steps
to save its state and prepare for a loss of power.
DSPRDY
14
—
0
6
0
DCHR
13
—
0
5
0
Interrupt Request Flag Register (IRQ_FLAG) (0x004)
DCHA
12
—
0
4
0
FUNCTION
ISUMOVF
NOZX
11
0
3
0
EOVF
Global Interrupt Registers
UV
10
0
2
0
CHSCH
OV
9
0
1
0
PWRF
OC
8
0
0
0