MAXQ3183-RAN+ Maxim Integrated Products, MAXQ3183-RAN+ Datasheet - Page 70

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MAXQ3183-RAN+

Manufacturer Part Number
MAXQ3183-RAN+
Description
IC AFE POLYPHASE MULTI 28TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAXQ3183-RAN+

Number Of Channels
8
Power (watts)
140mW
Voltage - Supply, Analog
3.6V
Voltage - Supply, Digital
3.6V
Package / Case
28-TSSOP
For Use With
MAXQ3183-KIT - KIT EV REFRNC DSIGN FOR MAXQ3183
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Bits
-
Other names
90-M3183+RAN
Low-Power, Multifunction, Polyphase AFE
with Harmonics and Tamper Detect
To enable harmonic measurement, first select a voltage
or current channel to monitor. This is done in the
AUX_CFG register. The AUX_MUX field is the 4-bit
value that selects one of the three voltage channels or
one of the four current channels to monitor.
The order of the harmonic is set in ORDH field of the
AUX_CFG register.
Also in the AUX_CFG register are two bits that enable
the auxiliary channel and enable harmonic measure-
ment on the auxiliary channel. To enable the auxiliary
channel, set the ENAUX bit. Once set, the MAXQ3183
will perform an RMS calculation on the selected chan-
nel. This is useful only for the I
nel, since every other voltage and current already have
RMS calculations applied by default. (The DADCNV bit
should be cleared in the SCAN_IN register in order to
enable sampling the I
To enable harmonic measurement, set the ENHARM
bit. Now, the selected voltage or current signal is
passed to a filter that is identical to the second-order
fundamental filter, but that has separate parameters
(A1HARM, B0HARM).
The MAXQ3183 can output the THDN ratio for selected
current channel on-demand. It is calculated as:
This represents the ratio of the power of harmonics plus
noise over the power of the fundamental signal. To acti-
vate THDN computation, the host must first configure
the AUX channel to produce first harmonic (fundamen-
tal) on the desired current channel:
• Set AUX_CFG = 0x01C3 for current phase A
• Set AUX_CFG = 0x01C5 for current phase B
• Set AUX_CFG = 0x01C7 for current phase C
Then the THDN ratio can be read from one of the fol-
lowing virtual registers:
• Register 0x859 returns THDN.A for current phase A
• Register 0x85A returns THDN.B for current phase B
• Register 0x85C returns THDN.C for current phase C
Each register returns a raw binary value representing
the THDN ratio with LSB = 2
involves signal filtering, the value THDN could require a
few seconds to settle before producing stable output.
70
______________________________________________________________________________________
Current Total Harmonic Distortion Plus
THDN X
.
N
channel.)
=
X IRMS
.
X IRMS
.
N
–32
(neutral current) chan-
2
fund
. Since computation
2
Noise (THDN)
1
The MAXQ3183 supports two forms of current vector
sum calculations depending on whether neutral current
I
or
The sum must be calculated on instantaneous sample
basis. In a balanced 3-phase system, the vector sum I
should be zero; a nonzero value indicates a current
unbalance. When neutral current available, vector sum
I
anced loads; a nonzero value indicates tamper (energy
theft) or wrong meter connection. In the MAXQ3183, the
samples for I
fore the device automatically applies an allpass filter to I
I
The MAXQ3183 calculates the RMS value of I
I
vector sum computations, the host must set following
configuration bits:
For I
1) AUX_CFG.ENAUX = 1—to enable the AUX channel
2) AUX_CFG.AUX_MUX = 1001b (0x9)—select IA + IB
The above settings result in AUX_CFG = 0x0049.
For I
1) SCAN_IN.DADCNV = 0—to enable ADC sampling
2) AUX_CFG.ENAUX = 1—to enable the AUX channel
3) AUX_CFG.AUX_MUX =1111b (0xF)—select IA + IB
The above settings result in AUX_CFG = 0x004F.
Once the above configuration is set, the MAXQ3183
starts accumulating the specified vector sum. The result
can then be read from the N.RMS register as raw value
or from I.N virtual register as converted value. If the
averaging filter is enabled (AVG_C > 0), the value could
require a few seconds to settle before producing stable
output. The MAXQ3183 has an additional control bit
AUX_CFG.INREV to reverse the sign of IN current. When
the bit is set (AUX_CFG = 0x006F), the MAXQ3183 cal-
culates the value (IA + IB + IC - IN) instead of (IA + IB +
IC + IN). Doing so allows vector sum computation in
case of reverse connection of neutral current sensor.
A threshold (ISUMLVL, address 0x054) can also be
specified to cause the MAXQ3183 to generate an inter-
rupt when the vector sum exceeds the threshold.
VS4
C
N
VS4
, and I
is available:
+ IC input to the AUX channel
neutral current IN (SCAN_IN = 0x60)
+ IC + IN input to the AUX channel
VS3
VS4
should be always zero, no matter balanced or unbal-
on-demand using the AUX channel. To activate
N
:
:
before calculating vector sum.
I
VS4
A
, I
I
VS3
(t) = I
B
, I
(t) = I
C
, and I
A
(t) + I
A
(t) + I
N
B
are not simultaneous, there-
(t) + I
Current Vector Sum
B
(t) + I
C
(t) + I
C
(t)
N
(t)
VS3
VS3
or
B
,

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