LTC2431CMS#PBF Linear Technology, LTC2431CMS#PBF Datasheet - Page 10

• Manufacturer Part Number: LTC2431CMS#PBF
• Description: IC ADC 20BIT DIFFINPUT/REF10MSOP
• Manufacturer: Linear Technology

Specifications of LTC2431CMS#PBF

• Number Of Bits: 20
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LTC2430/LTC2431
SDO (Pin 8): Three-State Digital Output. During the Data
Output period, this pin is used as the serial data output.
When the chip select CS is HIGH (CS = V
is in a high impedance state. During the Conversion and
Sleep periods, this pin is used as the conversion status
output. The conversion status can be observed by pulling
CS LOW.
SCK (Pin 9): Bidirectional Digital Clock Pin. In Internal
Serial Clock Operation mode, SCK is used as the digital
output for the internal serial interface clock during the Data
Output period. In External Serial Clock Operation mode,
SCK is used as the digital input for the external serial
interface clock during the Data Output period. A weak
internal pull-up is automatically activated in Internal Serial
FU CTIO AL BLOCK DIAGRA
TEST CIRCUITS
PI FU CTIO S
10
REF
REF
GND
V
IN
IN
CC
U
+
–
+
–
U
U
+
–
U
U
SDO
(LTC2431)
DAC
Hi-Z TO V
V
V
1.69k
OL
OH
TO V
TO Hi-Z
OH
OH
2431 TA03
CC
C
LOAD
), the SDO pin
= 20pF
W
Figure 1
Clock Operation mode. The Serial Clock Operation mode is
determined by the logic level applied to the SCK pin at
power up or during the most recent falling edge of CS.
F
controls the ADC’s notch frequencies and conversion
time. When the F
converter uses its internal oscillator and the digital filter
first null is located at 50Hz. When the F
to GND (F
and the digital filter first null is located at 60Hz. When F
is driven by an external clock signal with a frequency f
the converter uses this signal as its system clock and the
digital filter first null is located at a frequency f
O
(Pin 10): Frequency Control Pin. Digital input that
ADC
O
= OV), the converter uses its internal oscillator
SDO
O
Hi-Z TO V
V
V
OH
OL
pin is connected to V
AUTOCALIBRATION
DECIMATING FIR
V
TO Hi-Z
TO V
AND CONTROL
CC
1.69k
2431 TA04
C
OL
OL
LOAD
= 20pF
OSCILLATOR
INTERFACE
INTERNAL
O
CC
SERIAL
pin is connected
(F
O
EOSC
= V
(INT/EXT)
CC
/2560.
), the
EOSC
F
SDO
SCK
CS
24301f
2431 FD
O
O
,