AD7655ASTZ Analog Devices Inc, AD7655ASTZ Datasheet - Page 10

IC ADC 16BIT 1MSPS QUAD 48-LQFP

AD7655ASTZ

Manufacturer Part Number
AD7655ASTZ
Description
IC ADC 16BIT 1MSPS QUAD 48-LQFP
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7655ASTZ

Data Interface
Serial, Parallel
Number Of Bits
16
Sampling Rate (per Second)
1M
Number Of Converters
1
Power Dissipation (max)
135mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
16bit
Sampling Rate
1MSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
4.75V To 5.25V
Package
48LQFP
Resolution
16 Bit
Architecture
SAR
Number Of Adcs
1
Number Of Analog Inputs
4
Digital Interface Type
Parallel|Serial (2-Wire, SPI, QSPI, Microwire)
Input Type
Voltage
Signal To Noise Ratio
86(Typ) dB
Polarity Of Input Voltage
Unipolar
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7655CBZ - BOARD EVALUATION FOR AD7655
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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AD7655ASTZ
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ADI
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Manufacturer:
Analog Devices Inc
Quantity:
10 000
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AD7655
Pin No.
35
37
38
39, 41
40, 45
42, 43
44, 46
1
Al = input; DI = digital input; DO = digital output; DI/O = bidirectional digital; P = power.
Mnemonic
CNVST
REF
REFGND
INB1, INB2
INBN, INAN
REFB, REFA
INA2, INA1
Type
DI
AI
AI
AI
AI
AI
AI
1
Description
Start Conversion. A falling edge on CNVST puts the internal sample-and-hold into the hold state and
initiates a conversion. In impulse mode (IMPULSE = HIGH), if CNVST is held LOW when the acquisition
phase (t
immediately started.
This input pin is used to provide a reference to the converter.
Reference Input Analog Ground.
Channel B Analog Inputs.
Analog Inputs Ground Senses. Allow to sense each channel ground independently.
These inputs are the references applied to Channel A and Channel B, respectively.
Channel A Analog Inputs.
8
) is complete, the internal sample-and-hold is put into the hold state and a conversion is
Rev. B | Page 10 of 28

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