KAD5512P-50Q72 Intersil, KAD5512P-50Q72 Datasheet - Page 8

• Manufacturer Part Number: KAD5512P-50Q72
• Description: IC ADC 12BIT 500MSPS SGL 72-QFN
• Manufacturer: Intersil
• Series: FemtoCharge™r

Specifications of KAD5512P-50Q72

• Number Of Bits: 12
• Sampling Rate (per Second): 500M
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 460mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 72-VFQFN Exposed Pad
• For Use With: KDC5512EVAL - DAUGHTER CARD FOR KAD5512KDC5512-50EVAL - DAUGHTER CARD FOR KAD5512
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pinout/Package Information
Pin Descriptions
2-5, 13, 14, 17, 18, 28-31
1, 6, 12, 19, 24, 71
26, 45, 55, 65
7, 8, 11, 72
27, 36, 56
20, 21
PIN #
9, 10
15
16
22
23
25
32
33
34
35
37
38
39
40
41
42
43
44
46
47
49
50
48
LVDS [LVCMOS] NAME
8
CLKP, CLKN
VINN, VINP
OUTMODE
CLKOUTN
[CLKOUT]
CLKOUTP
RESETN
NAPSLP
CLKDIV
RLVDS
OVDD
OVSS
AVDD
AVSS
DNC
VCM
D0N
[NC]
D1N
[NC]
D2N
[NC]
D3N
[NC]
D4N
[NC]
D5N
[NC]
[NC]
D6N
[NC]
D0P
[D0]
D1P
[D1]
D2P
[D2]
D3P
[D3]
D4P
[D4]
D5P
[D5]
D6P
[D6]
Analog Ground
Analog Input Negative, Positive
Common Mode Output
Tri-Level Clock Divider Control
Clock Input True, Complement
Tri-Level Output Mode (LVDS, LVCMOS)
Tri-Level Power Control (Nap, Sleep modes)
Power-On Reset (Active Low, see “User Initiated Reset” on page 15)
Output Ground
1.8V Output Supply
LVDS Bit 0 (LSB) Output Complement
[NC in LVCMOS]
LVDS Bit 0 (LSB) Output True
[LVCMOS Bit 0]
LVDS Bit 1 Output Complement
[NC in LVCMOS]
LVDS Bit 1 Output True
[LVCMOS Bit 1]
LVDS Bit 2 Output Complement
[NC in LVCMOS]
LVDS Bit 2 Output True
[LVCMOS Bit 2]
LVDS Bit 3 Output Complement
[NC in LVCMOS]
LVDS Bit 3 Output True
[LVCMOS Bit 3]
LVDS Bit 4 Output Complement
[NC in LVCMOS]
LVDS Bit 4 Output True
[LVCMOS Bit 4]
LVDS Bit 5 Output Complement
[NC in LVCMOS]
LVDS Bit 5 Output True
[LVCMOS Bit 5]
LVDS Bias Resistor (connect to OVSS with a 10kΩ, 1% resistor)
LVDS Clock Output Complement
[NC in LVCMOS]
LVDS Clock Output True
[LVCMOS CLKOUT]
LVDS Bit 6 Output Complement
[NC in LVCMOS]
LVDS Bit 6 Output True
[LVCMOS Bit 6]
1.8V Analog Supply
Do Not Connect
KAD5512P-50
LVDS [LVCMOS] FUNCTION
October 9, 2009
FN6805.3