LTC2431CMS#TR Linear Technology, LTC2431CMS#TR Datasheet
LTC2431CMS#TR
Specifications of LTC2431CMS#TR
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LTC2431CMS#TR Summary of contents
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... The LTC2430/LTC2431 communicate through a flexible 3-wire digital interface that is compatible with SPI and MICROWIRE , LTC and LT are registered trademarks of Linear Technology Corporation. No Latency MICROWIRE is a trademark of National Semiconductor Corporation. = INTERNAL OSC/50Hz REJECTION = EXTERNAL CLOCK SOURCE ...
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LTC2430/LTC2431 ABSOLUTE AXI U RATI GS Supply Voltage ( GND .......................– 0. Analog Input Pins Voltage to GND ......................................... – 0. Reference Input Pins Voltage to GND ......................................... – 0.3V ...
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U CO VERTER CHARACTERISTICS temperature range, otherwise specifications are at T PARAMETER CONDITIONS Input Common Mode Rejection DC 2.5V REF GND IN Input Common Mode Rejection 2.5V REF 60Hz 2% GND IN Input Common Mode Rejection 2.5V REF 50Hz 2% ...
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LTC2430/LTC2431 U U DIGITAL I PUTS A D DIGITAL OUTPUTS operating temperature range, otherwise specifications are at T SYMBOL PARAMETER V High Level Input Voltage IH CS Low Level Input Voltage IL CS High ...
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CHARACTERISTICS range, otherwise specifications are SYMBOL PARAMETER f External Oscillator Frequency Range EOSC t External Oscillator High Period HEO t External Oscillator Low Period LEO t Conversion Time CONV f Internal SCK ...
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LTC2430/LTC2431 W U TYPICAL PERFOR A CE CHARACTERISTICS Total Unadjusted Error ( 5V) CC REF REF 2.5V INCM INCM GND ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS RMS Noise vs V INCM 3 REF = 5V – REF = GND 3 GND INCM F = GND O 3.0 T ...
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LTC2430/LTC2431 W U TYPICAL PERFOR A CE CHARACTERISTICS Full-Scale Error vs V REF – REF = GND GND 0.5V 10 INCM REF +FS ERROR ...
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CTIO S (LTC2430) GND (Pins 10, 15, 16): Ground. Multiple ground pins internally connected for optimum ground current flow and V decoupling. Connect each one of these pins ...
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LTC2430/LTC2431 CTIO S (LTC2431) SDO (Pin 8): Three-State Digital Output. During the Data Output period, this pin is used as the serial data output. When the chip select CS is HIGH ( ...
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U U APPLICATIO S I FOR ATIO CONVERTER OPERATION Converter Operation Cycle The LTC2430/LTC2431 are low power, delta-sigma analog- to-digital converters with an easy-to-use 3-wire serial inter- face (see Figure 1). Their operation is made up of three states. The ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO Power-Up Sequence The LTC2430/LTC2431 automatically enter an internal reset state when the power supply voltage V below approximately 2V. This feature guarantees the integrity of the conversion result and of the serial ...
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U U APPLICATIO S I FOR ATIO above +FS. If both Bit 21 and Bit 20 are LOW, the differential input voltage is below –FS. The function of these bits is summarized in Table 1. Table 1. LTC2430/LTC2431 Status Bits ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO +FS, the conversion result is clamped to the value corre- sponding to the +FS + 1LSB. For differential input voltages below –FS, the conversion result is clamped to the value corresponding to ...
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U U APPLICATIO S I FOR ATIO Table 3. LTC2430/LTC2431 State Duration State Operating Mode CONVERT Internal Oscillator External Oscillator SLEEP DATA OUTPUT Internal Serial Clock External Serial Clock with Frequency f kHz SCK is HIGH or floating at power-up ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO Table 4. LTC2430/LTC2431 Interface Timing Modes Configuration External SCK, Single Cycle Conversion External SCK, 2-Wire I/O Internal SCK, Single Cycle Conversion Internal SCK, 2-Wire I/O, Continuous Conversion CS TEST EOC TEST EOC ...
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U U APPLICATIO S I FOR ATIO CS TEST EOC BIT 0 SDO EOC Hi-Z Hi-Z SCK (EXTERNAL) SLEEP CONVERSION DATA SLEEP OUTPUT TEST EOC (OPTIONAL) Figure 6. External Serial Clock, Reduced Data Output Length the device aborts the data ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO CS SDO SCK (EXTERNAL) CONVERSION CS TEST EOC SDO Hi-Z Hi-Z SCK (INTERNAL) CONVERSION SLEEP SLEEP TEST EOC (OPTIONAL 2. LTC2430/ ...
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U U APPLICATIO S I FOR ATIO The serial data output pin (SDO) is Hi-Z as long HIGH. At any time during the conversion cycle, CS may be pulled LOW in order to monitor the state of ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO internal pull-up is not available to restore SCK to a logic HIGH state. This will cause the device to exit the internal serial clock mode on the next falling edge of CS. ...
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U U APPLICATIO S I FOR ATIO low power sleep state. The part remains in the sleep state a minimum amount of time (1/2 the internal SCK period) then immediately begins outputting data. The data output cycle begins on the ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO between the F signal trace and the input/reference sig- O nals. When the F signal is parallel terminated near the O converter, substantial AC current is flowing in the loop formed by ...
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U U APPLICATIO S I FOR ATIO sampling charge transfers when integrated over a sub- stantial time period (longer than 64 internal clock cycles). The effect of this input dynamic current can be analyzed using the test circuit of Figure ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO The typical +FS and –FS errors as a function of the sum of + the source resistance seen by IN and are shown in Figure 15 addition ...
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U U APPLICATIO S I FOR ATIO a specification can also be easily achieved by an external clock. When relatively stable resistors (50ppm/ C) are used for the external source impedance seen by IN – the expected drift ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO 0 C REF –10 – REF REF – REF –40 V – = GND REF V + ...
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U U APPLICATIO S I FOR ATIO Output Data Rate When using the internal oscillator, the LTC2430/LTC2431 can produce up to 7.5 readings per second with a notch frequency of 60Hz (F = LOW) and 6.25 readings per O second ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO INCM REFCM REF EXT OSC ...
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U U APPLICATIO S I FOR ATIO REF 2. 2.5V REF INCM REFCM EXT OSC O ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO If the F pin is driven by an external oscillator of frequency Figure 29 can still be used for noise calculation if the EOSC x-axis is scaled by f ...
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U U APPLICATIO S I FOR ATIO 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 INPUT SIGNAL FREQUENCY (Hz) Figure 32. Input Normal Mode ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO IN(P- 7.5V IN(P-P) –20 (150% OF FULL SCALE) –40 – 60 –80 –100 –120 105 120 135 150 165 ...
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U U APPLICATIO S I FOR ATIO where measurement speed is not of the utmost impor- tance. For many applications where large vessels are weighed, the average weight over an extended period of time is of concern and short term ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO practice in earlier generations of load-cell interfaces, how- ever the accuracy of the LTC2430/LTC2431 changes the rationale. Achieving high gain accuracy and linearity at higher gains may prove difficult, while providing little ...
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U U APPLICATIO S I FOR ATIO single variable element bridges, the nonlinearity of the half bridge output can be eliminated completely; if the refer- ence arm of the bridge is used as the reference to the ADC, as shown ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO The circuit shown in Figure 42 shows a more rigorous example of Figure 41, with increased noise suppression and more protection for remote applications. Figure 43 shows an example of gain in ...
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U U APPLICATIO S I FOR ATIO temperature) will produce a worst-case error of –180ppm at a noise gain of 3, such as would be encountered in an inverting gain produce –10V from a 5V reference. The ...
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LTC2430/LTC2431 U U APPLICATIO S I FOR ATIO 2N3904 350 BRIDGE TWO ELEMENTS VARYING Q2, Q3 2N3906 Figure 45. Use Resistor Arrays to Provide Precise Matching in Excitation Amplifier 15V 1 LT1112 ...
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... LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... Noise, Pin Compatible with LTC2404/LTC2408 ADC 200nV RMS www.linear.com (V + 0.25V) TO 20V OUT 4 0 INTERNAL OSC/50Hz REJECTION = EXTERNAL CLOCK SOURCE INTERNAL OSC/60Hz REJECTION 3-WIRE SPI INTERFACE CS 24301 TA05 2 Noise P-P Noise RMS Noise, 4000Hz Output Rate LT/TP 0303 2K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2002 24301f ...