LTC2435-1IGN Linear Technology, LTC2435-1IGN Datasheet

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... INL and 0.8ppm RMS noise. They use delta-sigma technology and provide single cycle settling time for multiplexed applications. Through a single pin, the LTC2435 can be configured for better than 110dB input differential mode rejection at 50Hz or 60Hz ±2 can be driven by an external oscillator for a user defined rejection frequency ...

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... LTC2435CGN#TRPBF LT2435-1CGN#PBF LTC2435-1CGN#TRPBF LT2435-1IGN#PBF LTC2435-1IGN#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: For more information on tape and reel specifications, go to: ...

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... Input Normal Mode Rejection (Notes 5, 8) 50Hz ±2% (LTC2435) 2.5V ≤ REF Input Common Mode Rejection GND ≤ IN 49Hz to 61.2Hz (LTC2435-1) Input Normal Mode Rejection F = GND (Note 5) O 49Hz to 61.2Hz (LTC2435-1) Input Normal Mode Rejection External Oscillator (Note 5) /2560 ± ...

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... LTC2435/LTC2435 DIGITAL I PUTS A D DIGITAL OUTPUTS operating temperature range, otherwise specifications are at T SYMBOL PARAMETER V High Level Input Voltage IH CS Low Level Input Voltage IL CS High Level Input Voltage IH SCK V Low Level Input Voltage IL SCK I Digital Input Current IN CS Digital Input Current ...

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... External SCK Frequency Range ESCK t External SCK Low Period LESCK t External SCK High Period HESCK t Internal SCK 24-Bit Data Output Time Internal Oscillator (Notes 10, 12), LTC2435 DOUT_ISCK t External SCK 24-Bit Data Output Time (Note 9) DOUT_ESCK CS ↓ to SDO Low ↑ to SDO High ↓ ...

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... LTC2435/LTC2435 TYPICAL PERFOR A CE CHARACTERISTICS Total Unadjusted Error ( 5V) REF –340 F = GND REF T = –45° 2.5V A INCM INCM –345 T = 25°C A –350 T = 85°C A –355 –360 –2.5 –1.5 0.5 1.5 –0.5 INPUT VOLTAGE (V) 2435 G01 Integral Nonlinearity ( 5V) REF 25° 85°C ...

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... GND –324 V = GND INCM F = GND –326 25°C A –328 –330 –332 –334 –336 –338 –340 2.7 3.1 3.9 4.7 3.5 4.3 V (V) CC LTC2435/LTC2435-1 RMS Noise vs Temperature (T 5 GND O 4 REF 4 GND 4.4 INCM 4.2 4.0 3.8 3.6 3.4 3.2 3.0 6 –50 –25 ...

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... REF = GND V = 0.5V INCM REF GND 25° –5 2.7 3.1 3.9 4.7 5.1 5.5 3.5 4.3 V (V) CC 2435 G21 PSRR vs Frequency (LTC2435-1) 0 ±0. 4. REF = 2.5V –20 – REF = GND + IN = GND – – GND F = GND 25°C A –60 –80 –100 –120 –140 ...

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... IN – REF = GND F = EXT OSC 25°C A RES = LOG (V /NOISE ) 2 REF RMS 100 120 140 160 180 200 OUTPUT DATA RATE (READINGS/SEC) LTC2435/LTC2435-1 Sleep-Mode Current vs Temperature –45 –30 – TEMPERATURE (°C) 2435 G29 ≤ 1LSB) vs Resolution (INL MAX Output Data Rate ...

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... When the F connected to GND (F oscillator and the digital filter first null is located at 60Hz (LTC2435) or simultaneous 50Hz/60Hz (LTC2435-1). When F O frequency f system clock and the digital filter first null is located at a ...

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... IN + REF – REF – + DAC TEST CIRCUITS SDO 1.69k C LOAD Hi Hi ∫ ∑ ADC Figure 1. Functional Block Diagram = 20pF 2435 TA03 LTC2435/LTC2435-1 INTERNAL OSCILLATOR AUTOCALIBRATION AND CONTROL (INT/EXT) SERIAL INTERFACE DECIMATING FIR V CC 1.69k SDO C = 20pF LOAD Hi Hi-Z OL 2435 TA04 ...

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... This eliminates the need for external frequency setting components such as crystals or oscillators. Clocked by the on-chip oscillator, the LTC2435 achieves a minimum of 110dB rejection at the line frequency (50Hz or 60Hz ±2%), while the LTC2435-1 achieves a minimum of 87db rejection at 50Hz ±2% and 60Hz ±2% simultaneously. ...

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... Based on the LTC2435/LTC2435-1 new modu- REF lator architecture, the temperature drift of the offset is less than 100nV/°C. More information on the LTC2435/ LTC2435-1 offset is described in the Offset Accuracy and Drift section of this data sheet. Power-Up Sequence The LTC2435/LTC2435-1 automatically enter an internal reset state when the power supply voltage V below approximately 2 ...

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... U APPLICATIO S I FOR ATIO Output Data Format The LTC2435/LTC2435-1 serial output data stream is 24 bits long. The first 3 bits represent status information indicating the sign and conversion state. The next 21 bits are the conversion result, MSB first. The third and fourth bit together are also used to indicate an underrange condition (the differential input voltage is below – ...

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... First, the variation with respect to supply voltage is linear. Second, the magnitude of the offset error decreases with de- creased supply voltage. Third, the offset error in micro- volts is almost independent with reference and therefore Table 2. LTC2435/LTC2435-1 Output Data Format Differential Input Voltage ≥ ...

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... HEO LEO the range 49Hz to 61.2Hz is required or when the converter must be synchronized with an outside source, the LTC2435-1 can operate with an external conversion clock. The performance of the LTC2435-1 is the same as the /2560 EOSC LTC2435 when driven by an external conversion clock at the F pin. ...

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... DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz) Figure 7b. LTC2435-1 Normal Mode Rejection When Using an Internal Oscillator with Running Averages Duration 67ms, Output Data Rate ≤ 15 Readings/s 80ms, Output Data Rate ≤ 12.4 Readings/s EOSC kHz (f /2560 Rejection) EOSC As Long HIGH As Long LOW But Not Longer Than 1.25ms (24 SCK cycles) ...

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... SDO pin on the falling edge of the serial clock. In the Internal SCK mode of operation, the SCK pin is an output and the LTC2435/LTC2435-1 create their own se- rial clock by dividing the internal conversion clock the External SCK mode of operation, the SCK pin is used as input ...

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... BIT 21 BIT 20 BIT 19 BIT 18 EOC SIG MSB DATA OUTPUT Figure 8. External Serial Clock, Single Cycle Operation LTC2435/LTC2435 50Hz REJECTION (LTC2435) = EXTERNAL OSCILLATOR = 60Hz REJECTION (LTC2435) = 50Hz/60Hz REJECTION (LTC2435-1) 3-WIRE SPI INTERFACE TEST EOC BIT 5 BIT 0 LSB Hi-Z CONVERSION 2435 F08 24351fb 19 ...

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... Once CS is pulled LOW, SCK goes LOW and EOC is output to the SDO pin. EOC = 1 while a conversion is in progress and EOC = 0 if the conversion is over 50Hz REJECTION (LTC2435) = EXTERNAL OSCILLATOR = 60Hz REJECTION (LTC2435) = 50Hz/60Hz REJECTION (LTC2435-1) 3-WIRE SPI INTERFACE TEST EOC BIT 19 BIT 9 ...

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... BIT 21 BIT 20 BIT 19 BIT 18 SIG MSB DATA OUTPUT Figure 11. Internal Serial Clock, Single Cycle Operation LTC2435/LTC2435-1 after EOC goes EOCtest is 23μs (LTC2435), 26μs (LTC2435-1) if EOCtest = logic LOW 50Hz REJECTION (LTC2435) = EXTERNAL OSCILLATOR = 60Hz REJECTION (LTC2435) = 50Hz/60Hz REJECTION (LTC2435-1) 2-WIRE INTERFACE ...

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... CS. This can be avoided by adding an external 10k pull-up resistor to the SCK pin or by never pulling CS HIGH when SCK is LOW. Whenever SCK is LOW, the LTC2435/LTC2435-1 internal pull-up at pin SCK is disabled. Normally, SCK is not externally driven if the device is in the internal SCK timing mode ...

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... 10, 15, 16 GND BIT 21 BIT 20 BIT 19 BIT 18 SIG MSB DATA OUTPUT Figure 13. Internal Serial Clock, Continuous Operation LTC2435/LTC2435-1 exceeds 2.2V. An internal 50Hz REJECTION (LTC2435) = EXTERNAL OSCILLATOR = 60Hz REJECTION (LTC2435) = 50Hz/60Hz REJECTION (LTC2435-1) 2-WIRE INTERFACE BIT 5 BIT 0 LSB CONVERSION 23 2435 F13 24351fb ...

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... OH CC During the conversion period, the undershoot and/or overshoot of a fast digital signal connected to the LTC2435/ LTC2435-1 pins may severely disturb the analog to digital conversion process. Undershoot and overshoot can oc- cur because of the impedance mismatch at the converter pin when the transition time of an external control signal is less than twice the propagation delay from the driver to LTC2435/LTC2435-1 ...

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... LTC2435-1’s front end is clocked at 69900Hz corre- sponding to 14.2μs. Thus, for settling errors of less than 1ppm, the driving source impedance should be chosen such that τ ≤ 13μs/14 = 920ns (LTC2435) and τ <14.2μ 1.01μs (LTC2435-1). When an external oscillator of frequency f ...

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... SW I LEAK 20k SWITCHING FREQUENCY V – LEAK ( – REF R (TYP LEAK (F 20k f V – SW REF I LEAK Figure 14. LTC2435/LTC2435-1 Equivalent Analog Input Circuit 0pF 0.01μF –10 IN –20 – 0.001μF IN –40 – 100pF CC IN – REF – GND REF – 3.75V IN – ...

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... 0.01μ 400 800 1200 1600 R (Ω) SOURCE Figure 19. –FS Error vs R SOURCE + – (Large LTC2435/LTC2435-1 –6 • f ppm. Figure 20 EOSC + – and IN pins when large C values are IN –310 A: ΔR E: Δ –200Ω ΔR F: ΔR = 500Ω = –500Ω ΔR G: Δ ...

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... REF – transferring For the LTC2435-1, the typical differential reference resis- tance is 17.1MΩ which will generate a +FS gain error of approximately 0.029ppm for each ohm of source resis- tance driving REF ...

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... When F = LOW (internal oscillator and 60Hz notch), every O 100Ω of source resistance driving REF into about 0.11ppm additional INL error. For the LTC2435, when F = HIGH (internal oscillator and 50Hz notch), every O 100Ω of source resistance driving REF into about 0.092ppm additional INL error ...

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... LTC2435/LTC2435 APPLICATIO S I FOR ATIO Output Data Rate When using its internal oscillator, the LTC2435 can pro- duce readings per second with a notch frequency of 60Hz (F = LOW) and 12.5 readings per second with a O notch frequency of 50Hz (F = HIGH) and the LTC2435-1 O can produce up to 13.6 readings per second with F LOW ...

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... OUTPUT DATA RATE (READINGS/SEC) Figure 32. Resolution (Noise vs Output Data Rate and Reference Voltage 25° 85°C A 2435 F28 2435 F30 ≤ 1LSB REF 2.5V REF 2435 F32 ≤ 1LSB) RMS LTC2435/LTC2435 25° 85° REF INCM REFCM – ...

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... U Through F 110dB input differential mode rejection at 50Hz or 60Hz ±2%. While for the LTC2435-1, it has a notch frequency of about 55Hz with better than 70db rejection over 48Hz to 62.4Hz, which covers both 50Hz ±2% and 60Hz ±2%. In order to achieve better rejection over the range of 48Hz to 62 ...

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... The same performance is obtained for the LTC2435 with the frequency scaled to have the notch fre- quency at 60Hz (F that the LTC2435/LTC2435-1 rejection performance is maintained with no compromises in this extreme situa- tion ...

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... LTC2435/LTC2435 APPLICATIO S I FOR ATIO 0 MEASURED DATA CALCULATED DATA –20 –40 –60 –80 –100 –120 150 175 200 100 125 INPUT FREQUENCY (Hz) Figure 38. Input Normal Mode Rejection vs Input Frequency (LTC2435- REF – REF = GND V = 2.5V INCM IN(P- GND 25°C A 225 2435 F38 ...

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... Figure 41. Use a Differential Multiplexer to Expand Channel Capability SCK LTC2435/ SDO LTC2435-1 CS Figure 42. Connecting the LTC2435/LTC2435 PIC16F73 MCU Using the SPI Serial Interface W U The listing in Figure data collection program for the LTC2435/LTC2435-1 using the PIC16F73 microcontroller. The microcontroller is configured to transfer data through the SPI serial interface ...

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... LTC2435 is connected to the processor’s hardware SPI port. // This sets the port such that data is shifted on clock falling edges and // valid on rising edges. For a 10 MHz master clock, the SPI clock frequency // wil be 2.5 MHz. setup_spi(SPI_MASTER|SPI_L_TO_H|SPI_CLK_DIV_4|SPI_SS_DISABLED); ...

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... Conversion actually started after last data byte was read, // but raising CS_ ensures the loop will never lock up waiting for // a low on SDO if a clock pulse is missed for some reason Figure 43. A Sample Program for Data Collection from the LTC2435/LTC2435-1 Using the PIC16F73 Microcontroller LTC2435/LTC2435-1 37 24351fb ...

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... The LTC2435/LTC2435-1 have the virtue of being able to digitize an input voltage that is outside the range defined by the reference, thereby providing a simple means to implement a ratiometric example of correlated double sampling. This circuit uses a bipolar amplifier (LT1219— ...

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... TYP .008 – .012 (0.203 – 0.305) TYP LTC2435/LTC2435-1 .189 – .196* (4.801 – 4.978) .009 (0.229 REF .150 – .157** (3.810 – 3.988) ...

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... LTC2435 REF 0.1μ – – REF LT1219 GND + 0.1μF SHDN 30pF 30pF Noise P-P Noise, Pin Compatible with LTC2435 RMS Noise, 4ppm INL, RMS Noise RMS LT 0807 REV B • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2001 2435 F46 24351fb ...