LTC2422CMS#TRPBF Linear Technology, LTC2422CMS#TRPBF Datasheet
LTC2422CMS#TRPBF
Specifications of LTC2422CMS#TRPBF
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LTC2422CMS#TRPBF Summary of contents
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... The LTC2421/LTC2422 communicate through 3-wire digital interface that is compatible with SPI and MICROWIRE , LTC and LT are registered trademarks of Linear Technology Corporation. No Latency is a trademark of Linear Technology Corporation. MICROWIRE is a trademark of National Semiconductor Corporation. V ...
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LTC2421/LTC2422 ABSOLUTE MAXIMUM Supply Voltage ( GND .......................– 0. Analog Input Voltage to GND ....... – 0. Reference Input Voltage to GND .. – 0. Digital Input Voltage ...
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ALOG I PUT A D REFERE CE temperature range, otherwise specifications are at T SYMBOL PARAMETER V Input Voltage Range IN FS Full-Scale Set Range SET ZS Zero-Scale Set Range SET C Input Sampling Capacitance S(IN) ...
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LTC2421/LTC2422 CHARACTERISTICS range, otherwise specifications are at T SYMBOL PARAMETER f External Oscillator Frequency Range EOSC t External Oscillator High Period HEO t External Oscillator Low Period LEO t Conversion Time CONV f Internal SCK ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS Total Unadjusted Error (3V Supply 2.5V REF –2 – –55 C, – –6 ...
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LTC2421/LTC2422 W U TYPICAL PERFOR A CE CHARACTERISTICS RMS Noise vs Reference Voltage REFERENCE VOLTAGE (V) 24212 G10 Noise ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS Conversion Current vs Temperature 230 220 V = 5.5V CC 210 200 V = 4.1V CC 190 180 V = 2.7V CC 170 160 150 – 55 –30 – ...
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LTC2421/LTC2422 W U TYPICAL PERFOR A CE CHARACTERISTICS INL vs Output Rate REF F = EXTERNAL – ...
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PIN FUNCTIONS SCK (Pin 9): Bidirectional Digital Clock Pin. In the Internal Serial Clock Operation mode, SCK is used as digital output for the internal serial interface clock during the data output period. In the External Serial ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO The LTC2421/LTC2422 are pin compatible with the LTC2401/LTC2402. The devices are designed to allow the user to incorporate either device in the same design with no modifications. While the LTC2421/LTC2422 output word ...
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U U APPLICATIO S I FOR ATIO Conversion Clock A major advantage delta-sigma converters offer over con- ventional type converters is an on-chip digital filter (com- monly known as Sinc or Comb filter). For high resolution, low frequency applications, this ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO fault current, a resistor may be added in series with the V pin without affecting the performance of the IN device. In the physical layout important ...
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U U APPLICATIO S I FOR ATIO Table 2. LTC2421/LTC2422 Output Data Format Bit 23 Bit 22* Input Voltage EOC CH0/CH1 V > 9/8 • CH0/CH1 IN REF 9/8 • CH0/CH1 REF V + 1LSB 0 ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO –60 –70 –80 –90 –100 –110 –120 –130 –140 –12 –8 – INPUT FREQUENCY DEVIATION FROM NOTCH FREQUENCY (%) Figure 5. LTC2421/LTC2422 Normal Mode Rejection When Using an External Oscillator ...
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U U APPLICATIO S I FOR ATIO interface with other devices LOW during the con- vert or sleep state, SDO will output EOC LOW during the conversion phase, the EOC bit appears HIGH on ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO At the conclusion of the data cycle, CS may remain LOW and EOC monitored as an end-of-conversion interrupt. Alternatively, CS may be driven HIGH setting SDO to Hi-Z. As described above, CS ...
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U U APPLICATIO S I FOR ATIO External Serial Clock, 2-Wire I/O This timing mode utilizes a 2-wire serial I/O interface. The conversion result is shifted out of the device by an exter- nally generated serial clock (SCK) signal, see ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO <t EOCtest CS TEST EOC BIT 23 SDO EOC Hi-Z Hi-Z SCK (INTERNAL) CONVERSION SLEEP HIGH before the first rising edge of SCK. In the internal SCK timing mode, SCK goes HIGH ...
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U U APPLICATIO S I FOR ATIO > t EOCtest CS TEST EOC BIT 0 SDO EOC Hi-Z Hi-Z Hi-Z SCK (INTERNAL) SLEEP CONVERSION DATA OUTPUT Figure 10. Internal Serial Clock, Reduced Data Output Length A similar situation may occur ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO CS BIT 23 BIT 22 SDO EOC CH0/CH1 SCK (INTERNAL) CONVERSION SLEEP Internal Serial Clock, Autostart Conversion This timing mode is identical to the internal serial clock, 2-wire I/O described above with ...
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U U APPLICATIO S I FOR ATIO GND SDO Hi-Z SCK (INTERNAL) CONVERSION 100 1000 10000 100000 CAPACITANCE ON ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO resistance ground plane through a minimum length trace. The use of multiple via holes is recommended to further reduce the connection resistance alternative configuration, the GND pin of the con- ...
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U U APPLICATIO S I FOR ATIO Input Current ( complete settling occurs on the input, conversion re- sults will be uneffected by the dynamic input current. If the settling is incomplete, it does not degrade the ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO 10 0 – 0pF 100pF – 1000pF IN – 0. –40 REF V ...
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U U APPLICATIO S I FOR ATIO 0.015ppm/ independent of capacitance at V Figure 26. In addition to the dynamic reference current, the V protection diodes have a temperature dependent leakage current. This leakage current, nominally 1nA ( 10nA max), ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO nummeas = nummeas + c1% LOCATE 2, 2: PRINT "Scan#="; nummeas; " "; DATE$; " "; TIME$; OUT mcr%, c0%: 'Initialize SCLK km: d2400 = 0: chan% = c0%: signneg% ...
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U U APPLICATIO S I FOR ATIO resistance R in series with the half-bridge sensor are P1 removed by the FS input to the ADC. The absolute full- SET scale output of the ADC (data out = FFFFF at V ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO The selection between CH0 and CH1 is automatic. Initially, after power-up, a conversion is performed on CH0. For each subsequent conversion, the input channel selection is alternated. Embedded within the serial data ...
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U U APPLICATIO S I FOR ATIO The absolute accuracy (less than 10 ppm total error) of the LTC2422 enables extremely accurate measurement of small signals sitting on large voltages. Each of the two pseudo differential measurements performed by the ...
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LTC2421/LTC2422 U U APPLICATIO S I FOR ATIO Below 4.2V, the LTC1535’s driver outputs Y and Z are in a high impedance state, allowing the 1k pull-down to de- fine the logic state at SCK. When the LTC2422 first be- ...
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... LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200 A www.linear.com SET LTC2422 CH1 CH0 ZS SET SET LTC2422 + 2500V – CH1 CH0 ZS SET SET LTC2422 CH1 CH0 ZS SET 24212 F37 Noise P-P LT/TP 0202 2K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2002 24212f ...