AD5231BRU10 Analog Devices Inc, AD5231BRU10 Datasheet - Page 20

• Manufacturer Part Number: AD5231BRU10
• Description: IC DGTL POT 1024POS 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5231BRU10

• Rohs Status: RoHS non-compliant
• Taps: 1024
• Resistance (ohms): 10K
• Number Of Circuits: 1
• Temperature Coefficient: 600 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Resistance In Ohms: 10K
• End To End Resistance: 10kohm
• Track Taper: Logarithmic
• Resistance Tolerance: +20, -40%
• No. Of Steps: 1024
• Supply Voltage Range: 2.7V To 5.5V, ± 2.25V To ± 2.75V
• Control Interface: Serial, SPI
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD5231
The general equation that determines the programmed output
resistance between W and B is
where:
D is the decimal equivalent of the data contained in the RDAC
register.
R
Terminal B.
R
For example, the output resistance values in Table 11 are set
for the given RDAC latch codes with V
R
Table 11. R
D (DEC)
1023
512
1
0
Note that, in the zero-scale condition, a finite wiper resistance
of 15 Ω is present. Care should be taken to limit the current
flow between W and B in this state to no more than 20 mA to
avoid degradation or possible destruction of the internal switches.
Like the mechanical potentiometer that the RDAC replaces, the
AD5231 part is totally symmetrical. The resistance between
Wiper W and Terminal A also produces a digitally controlled
complementary resistance, R
programmability of the various terminal connections. When
R
Setting the resistance value for R
of resistance and decreases as the data loaded in the latch is
increased in value.
AB
W
AB
WA
is the wiper resistance.
is the nominal resistance between Terminal A and
= 10 kΩ digital potentiometers).
is used, Terminal B can be left floating or tied to the wiper.
R
100
75
50
25
WB
0
0
(
D
WB
R
10,005
50,015
24.7
15
)
Figure 44. R
WB
=
(D) at Selected Codes for R
R
(D) (Ω)
1024
WA
D
256
×
WA
R
(D) and R
AB
Output State
Full scale
Midscale
1 LSB
Zero scale (wiper contact resistor)
CODE (Decimal)
+
WA
R
W
. Figure 44 shows the symmetrical
512
WB
WA
(D) vs. Decimal Code
starts at a maximum value
DD
= 5 V (applies to
AB
768
= 10 kΩ
R
WB
1
023
Rev. C | Page 20 of 28
(1)
The general transfer equation for this operation is
For example, the output resistance values in Table 12 are set for
the RDAC latch codes with V
digital potentiometers).
Table 12. R
D (DEC)
1023
512
1
0
The typical distribution of R
tightly when they are processed in the same batch. When
devices are processed at a different time, device-to-device
matching becomes process-lot dependent and exhibits a −40%
to +20% variation. The change in R
600 ppm/°C temperature coefficient.
PROGRAMMING THE POTENTIOMETER DIVIDER
Voltage Output Operation
The digital potentiometer can be configured to generate an
output voltage at the wiper terminal that is proportional to the
input voltages applied to Terminal A and Terminal B. For
example, connecting Terminal A to 5 V and Terminal B to
ground produces an output voltage at the wiper that can be any
value from 0 V to 5 V. Each LSB of voltage is equal to the
voltage applied across Terminals A–B divided by the 2
resolution of the potentiometer divider.
Because AD5231 can also be supplied by dual supplies, the
general equation defining the output voltage at V
to ground for any given input voltages applied to Terminal A
and Terminal B is
Equation 3 assumes that V
wiper resistance is minimized. Operation of the digital
potentiometer in divider mode results in more accurate
operation over temperature. Here, the output voltage is
dependent on the ratio of the internal resistors and not the
absolute value; therefore, the drift improves to 15 ppm/°C.
There is no voltage polarity restriction between Terminal A,
Terminal B, and Terminal W as long as the terminal voltage
(V
TERM
V
R
) stays within V
WB
W
(
(
D
D
)
WA
)
=
=
(D) at Selected Codes for R
1024
1024
D
R
24.7
5015
10005
10,015
1024
WA
×
(D) (Ω)
−
V
SS
D
AB
< V
×
+
W
R
TERM
V
AB
is buffered so that the effect of
AB
DD
B
from device to device matches
+
= 5 V (applies to R
< V
R
W
AB
DD
with temperature has a
.
Output State
Full scale
Midscale
1 LSB
Zero scale
AB
= 10 kΩ
W
AB
with respect
= 10 kΩ
N
position
(2)
(3)