DAC101C081CIMK/NOPB National Semiconductor, DAC101C081CIMK/NOPB Datasheet - Page 17

• Manufacturer Part Number: DAC101C081CIMK/NOPB
• Description: DAC 10BIT MICROPWR I2C TSOT23-6
• Manufacturer: National Semiconductor

Specifications of DAC101C081CIMK/NOPB

• Settling Time: 3µs
• Number Of Bits: 10
• Data Interface: I²C, Serial
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 730µW
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: TSOT-23-6, TSOT-6
• For Use With: DAC101C08XEB - BOARD EVALUATION FOR DAC101C08X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DAC101C081CIMK; DAC101C081CIMK; DAC101C081CIMKTR

1.4.5 Writing to the DAC Register
To write to the DAC, the master addresses the part with the
correct slave address (A6-A0) and writes a "zero" to the
read/write bit. If addressed correctly, the DAC returns an ACK
to the master. The master then sends out the upper data byte.
The DAC responds by sending an ACK to the master. Next,
the master sends the lower data byte to the DAC. The DAC
responds by sending an ACK again. At this point, the master
1.4.6 Reading from the DAC Register
To read from the DAC register, the master addresses the part
with the correct slave address (A6-A0) and writes a "one" to
the read/write bit. If addressed correctly, the DAC returns an
ACK to the master. Next, the DAC sends out the upper data
byte. The master responds by sending an ACK to the DAC to
indicate that it wants to receive another data byte. Then the
FIGURE 7. Typical Read from the DAC Register
FIGURE 6. Typical Write to the DAC Register
17
either sends the upper byte of the next data word to be con-
verted by the DAC, generates a Stop condition to end com-
munication, or generates a Repeated Start condition to begin
communication with another device on the bus. Until gener-
ating a Stop condition, the master can continuously write the
upper and lower data bytes to the DAC register. This allows
for
kilo-conversions per second in Hs-mode.
DAC sends the lower data byte to the master. Assuming only
one 16-bit data word is read, the master sends a NACK after
receiving the lower data byte. At this point, the master either
generates a Stop condition to end communication, or a Re-
peated Start condition to begin communication with another
device on the bus.
a
maximum
DAC
conversion
rate
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