TXC-05802AIPQ Transwitch Corporation, TXC-05802AIPQ Datasheet - Page 6

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TXC-05802AIPQ

Manufacturer Part Number
TXC-05802AIPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-05802AIPQ

Operating Supply Voltage (typ)
3.3/5V
Operating Temperature Classification
Industrial
Package Type
PQFP
Mounting
Surface Mount
Pin Count
208
Lead Free Status / Rohs Status
Not Compliant
On the cell outlet side, cells of proper unicast address, broadcast address or selected multicast address,
received from the bus via the CellBus Bus Interface Logic block, are recognized by the Cell Address Screen
block and routed into a FIFO structure in the Outlet Queue block. The unicast address is unique per device, set
by device straps. Each CUBIT- Pro may be programmed to accept cells associated with multicast sessions.
From zero up to the full 256 multicast sessions may be accepted independently by each CUBIT- Pro on the
bus. Data cells from the bus go into a 123-cell outlet data cell queue structure. Control cells and Loopback
cells arriving from the bus are routed to the 4-cell outlet control queue, and the 1-cell outlet loopback queue,
respectively. The outlet data cell FIFO structure can be treated as a single 123-cell queue, or it can be subdi-
vided into four individual queues for traffic of different service types. The four-queue split is typically into high-
speed control data cells, CBR cells, VBR cells, and ABR cells, in decreasing order of outlet service priority.
This allows for delay minimization of critical service types, and for more efficient traffic management. At the cell
outlet, provisions are made for insertion of an outgoing Generic Flow Control (GFC) field and an Explicit For-
ward Congestion Indication (EFCI) bit.
OPERATION
INTRODUCTION TO CellBus BUS ARCHITECTURE
CellBus Bus Operation
The CUBIT- Pro is a versatile CMOS VLSI device for implementing ATM switching functions. Various ATM cell
switching or multiplexing structures can be formed by interconnection of a number of CUBIT- Pro devices over
a 37-line parallel bus with 32 data bits, the CellBus bus. Since the interconnect structure is a bus, communica-
tions between any of the devices on the bus is possible. Each cell placed onto the CellBus bus by a CUBIT- Pro
device can be routed either to one single CUBIT- Pro (unicast addressing), or to multiple CUBIT- Pro devices
(multicast or broadcast addressing). Depending upon the needs of an application, up to 32 CUBIT- Pro devices
may be interconnected on one CellBus bus. With a maximum bus frequency of more than 38 MHz, the raw
bandwidth of the CellBus bus exceeds 1 Gbit/s.
The CellBus bus, shown in Figure 2, is a shared bus, and can be implemented either on a single circuit card, or
in a backplane configuration among multiple circuit cards. Since multiple CUBIT-Pros share the same bus, bus
access contention must be resolved. This access contention is resolved by use of a central arbitration function.
CUBIT-Pros will request bus access, and the central Bus Arbiter will grant access back, in response. The cir-
cuitry for this Bus Arbiter is included inside the CUBIT- Pro device. Any one CUBIT- Pro in a system may be
selected to perform the bus arbitration function by setting its ENARB pin low.
CUBIT- Pro ’s
Generator
Enabled
Arbiter
Frame
Pulse
Bus
and
CUBIT- Pro
Figure 2. CellBus Bus Structure
- 6 -
CUBIT- Pro
CUBIT- Pro
Data (32)
Clock (2)
Frame
Acknowledge
Congestion Indicator
Ed. 3, November 1999
TXC-05802
CUBIT- Pro
TXC-05802-MB

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