MT16LSDT12864AG-133C1 Micron Technology Inc, MT16LSDT12864AG-133C1 Datasheet
MT16LSDT12864AG-133C1
Specifications of MT16LSDT12864AG-133C1
Related parts for MT16LSDT12864AG-133C1
MT16LSDT12864AG-133C1 Summary of contents
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... MT16LSDT12864A – 1GB For the latest data sheet, refer to Micron’s Web site: Features • PC100- and PC133-compliant • 168-pin, dual in-line memory module (DIMM) • Utilizes 125 MHz and 133 MHz SDRAM components • Unbuffered • 512MB (64 Meg x 64), 1GB (128 Meg x 64) • ...
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... MT8LSDT6464AG-13E_ MT8LSDT6464AY-13E_ MT8LSDT6464AG-133_ MT8LSDT6464AY-133_ MT16LSDT12864AG-13E_ MT16LSDT12864AY-13E_ MT16LSDT12864AG-133_ MT16LSDT12864AY-133_ Notes: 1. The designators for component and PCB revision are the last two characters of each part number. Consult factory for current revision codes. Example: MT8LSDT6464AG-133B1. PDF: 09005aef8088b2e3/Source: 09005aef8088077a SD8_16C64_128x64AG.fm - Rev. C 6/05 EN 512MB (SR), 1GB (DR): (x64) 168-Pin SDRAM UDIMM ...
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... A10 BA1 DQ14 DQ15 CK0 63 Figure 2: Pin Locations (168-Pin DIMM) Front View U1 Back View (Populated only for 1GB module) U11 PDF: 09005aef8088b2e3/Source: 09005aef8088077a SD8_16C64_128x64AG.fm - Rev. C 6/05 EN 512MB (SR), 1GB (DR): (x64) 168-Pin SDRAM UDIMM DQ21 86 DQ32 S2# 66 DQ22 87 DQ33 DQMB2 67 DQ23 88 DQ34 DQMB3 68 ...
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... HIGH). The address inputs also provide the op- code during a MODE REGISTER SET command. Input Serial clock for presence-detect: SCL is used to synchronize the presence-detect data transfer to and from the module. Input Presence-Detect address Inputs: These pins are used to configure the presence-detect device. ...
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... Functional Block Diagrams All resistor values are 10Ω unless otherwise specified. Per industry standard, Micron modules use various component speed grades as refer- enced in the module part numbering guide at: www.micron.com/numberguide. Standard modules use the following SDRAM devices: MT48LC64M8A2TG. Lead-free modules use the following SDRAM devices: MT48LC64M8A2P ...
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Figure 4: Dual Rank S0# DQMB0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQMB1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 S2# DQMB2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQMB3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 ...
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... SDRAM modules incorporate serial presence-detect (SPD). The SPD function is imple- mented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes can be programmed by Micron to identify the module type and vari- ous SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...
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INHIBIT or NOP . Starting at some point during this 100µs period and continuing at least through the end of this period, COMMAND INHIBIT or NOP commands should be applied. Once the 100µs delay has been satisfied with at least ...
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Figure 5: Mode Register Definition Diagram M12, M11, M10 = “0, 0, 0” to ensure compatibility with future devices. PDF: 09005aef8088b2e3/Source: 09005aef8088077a SD8_16C64_128x64AG.fm - Rev. C 6/05 EN 512MB (SR), 1GB (DR): (x64) 168-Pin SDRAM UDIMM A12 A11 A10 A8 ...
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Table 6: Burst Definition Table Burst Length Full Page Notes: 1. For full-page accesses 2,048. 2. For A1–A9, A11 select the block of two burst; A0 selects the starting column within the block. 3. For ...
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Figure 6: CAS Latency Diagram COMMAND COMMAND Burst Type Accesses within a given burst may be programmed to be either sequential or interleaved; this is referred to as the burst type and is selected via bit M3. The ordering of ...
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Operating Mode The normal operating mode is selected by setting M7 and M8 to zero; the other combi- nations of values for M7 and M8 are reserved for future use and/or test modes. The pro- grammed burst length applies to ...
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Commands Table 8 provides a quick reference of available commands. This is followed by a written description of each command. For a more detailed description of commands and oper- ations, refer to the 512Mb SDRAM component data sheet. Table 8: ...
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Absolute Maximum Ratings Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections ...
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... Auto refresh current CKE = HIGH; CS# = HIGH Self refresh current: CKE ≤ 0.2V Note Value calculated as one module rank in this condition, and all other module ranks in power-down mode ( Value calculated reflects all module ranks in this condition. PDF: 09005aef8088b2e3/Source: 09005aef8088077a SD8_16C64_128x64AG.fm - Rev. C 6/05 EN ...
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... Input/Output capacitance Operating Specifications Table 16: Electrical Characteristics and Recommended AC Operating Conditions Notes 11, 31; notes appear on page 18 Module AC timing parameters comply with PC100 and PC133 Design Specs, based on component parameters AC Characteristics Parameter Access time from CLK (positive edge) Address hold time Address setup time ...
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... Table 16: Electrical Characteristics and Recommended AC Operating Conditions (continued) Notes 11, 31; notes appear on page 18 Module AC timing parameters comply with PC100 and PC133 Design Specs, based on component parameters AC Characteristics Parameter Data-out High-Z time Data-out Low-Z time Data-out hold time (load) Data-out hold time (no load) ...
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Notes 1. All voltages referenced This parameter is sampled. V 1.4V MHz with minimum cycle time and the outputs open. 4. Enables on-chip refresh and address counters. 5. The minimum specifications ...
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... Refer to device data sheet for timing waveforms. 32. The value of 33. Leakage number reflects the worst case leakage possible through the module pin, not what each memory device contributes. PDF: 09005aef8088b2e3/Source: 09005aef8088077a SD8_16C64_128x64AG ...
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Serial Presence Detect SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 7, and ...
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Figure 8: Definition of Start and Stop SCL SDA Figure 9: Acknowledge Response From Receiver SCL from Master Data Output from Transmitter Data Output from Receiver Table 18: EEPROM Device Select Code The most significant bit (b7) is sent first ...
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Figure 10: SPD EEPROM Timing Diagram SCL t SU:STA SDA IN SDA OUT Table 20: SERIAL Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic ...
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Table 21: Serial Presence-Detect EEPROM AC Operating Conditions (continued) All voltages referenced to V Parameter/Condition Data-in setup time Start condition setup time Stop condition setup time WRITE cycle time Notes avoid spurious start and stop conditions, a minimum ...
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... Byte Description 0 Number of bytes used by Micron 1 Total number of SPD memory bytes 2 Memory type 3 Number of row addresses 4 Number of column addresses 5 Number of module ranks 6 Module data width 7 Module data width (continued) 8 Module voltage interface levels t 9 SDRAM cycle time, CK (CAS latency = 3) 10 SDRAM access from Clock, ...
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... SDRAM UDIMM Entry (Version 60ns (-13E) 66ns (-133) REV. 2.0 (-13E) (-133) MICRON 0 100 MHz (-13E/-133) t RAS used for -13E modules is calculated from Micron Technology, Inc., reserves the right to change products or specifications without notice. 25 Serial Presence Detect MT8LSDT6464A MT16LSDT12864A ...
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... LOW PROFILE PCB FRONT VIEW 5.256 (133.50) 5.244 (133.20 0.250 (6.35) TYP 1.661 (42.18) 0.039 (1.00)R (2X) 4.550 (115.57) 26 Module Dimensions 0.700 (17.78) TYP U10 0.128 (3.25) (2X) 0.118 (3.00) 0.050 (1.27) 0.039 (1.00) TYP TYP PIN 84 (PIN 168 ON BACKSIDE) ...
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... 0.250 (6.35) TYP 1.661 (42.18) 0.039 (1.00)R 2.625 (66.68) (2X) 4.550 (115.57) BACK VIEW U13 U14 U16 27 Module Dimensions 1.380 (35.05) 1.370 (34.80) 0.700 (17.78) TYP U10 0.128 (3.25) (2X) 0.118 (3.00) 0.050 (1.27) 0.039 (1.00) TYP TYP PIN 84 ...
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... Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. PDF: 09005aef8088b2e3/Source: 09005aef8088077a SD8_16C64_128x64AG.fm - Rev. C 6/05 EN 512MB (SR), 1GB (DR): (x64) 168-Pin SDRAM UDIMM ® Micron Technology, Inc., reserves the right to change products or specifications without notice. 28 Module Dimensions ©2002 Micron Technology, Inc. All rights reserved. ...