MT48LC4M16A2P-75 Micron Technology Inc, MT48LC4M16A2P-75 Datasheet - Page 69

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MT48LC4M16A2P-75

Manufacturer Part Number
MT48LC4M16A2P-75
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC4M16A2P-75

Organization
4Mx16
Density
64Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant

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Figure 52:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
DQML, DQMH
A0–A9, A11
COMMAND
BA0, BA1
DQM /
CKE
CLK
A10
DQ
WRITE – Full-Page Burst
t CMS
t CKS
Notes:
t AS
t AS
t AS
ACTIVE
BANK
ROW
ROW
T0
t CKH
t CMH
t AH
t AH
t AH
t RCD
1. x16: A8, A9 and A11 = “Don’t Care”
2.
3. Page left open; no
t CL
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
t
WR must be satisfied prior to PRECHARGE command.
T1
NOP
t CH
t CMS
t CK
COLUMN m 1
t DS
D
T2
WRITE
BANK
IN
t CMH
t DH
m
t
RP.
t DS
D
IN
T3
NOP
m + 1
t DH
69
1,024 (x4) locations within same row
256 (x16) locations within same row
512 (x8) locations within same row
t DS
D
IN
T4
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Full page completed
t DS
D
IN
T5
NOP
m + 3
t DH
(
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(
(
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(
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)
)
64Mb: x4, x8, x16 SDRAM
t DS
Tn + 1
D
IN
NOP
m - 1
t DH
Full-page burst does
not self-terminate. Can
use BURST TERMINATE
command to stop.
©2000 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t DS
BURST TERM
Tn + 2
t DH
2, 3
DON’T CARE
Tn + 3
NOP

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