MC145193F Freescale Semiconductor, MC145193F Datasheet - Page 17

• Manufacturer Part Number: MC145193F
• Manufacturer: Freescale Semiconductor

Specifications of MC145193F

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: SO
• Pin Count: 20
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Crystal Oscillator Considerations
reference frequency to Motorola’s CMOS frequency
synthesizers.
Use of a Hybrid Crystal Oscillator
crystal oscillators (TCXOs) or crystal–controlled data clock
oscillators provide very stable reference frequencies. An
oscillator capable of CMOS logic levels at the output may be
direct or dc coupled to REF in . If the oscillator does not have
CMOS logic levels on the outputs, capacitive or ac coupling
to REF in may be used (see Figure 8).
oscillators, please consult the latest version of the eem
Electronic Engineers Master Catalog, the Gold Book, or
similar publications.
Design an Off–Chip Reference
discrete transistors or ICs specifically developed for crystal
oscillator applications. The reference signal is usually ac
coupled to REF in (see Figure 8). For large amplitude signals
(standard CMOS logic levels), dc coupling may be used.
Use of the On–Chip Oscillator Circuitry
appropriate crystal may be used to provide a reference
source frequency. A fundamental mode crystal, parallel
resonant at the desired operating frequency, should be
connected as shown in Figure 18.
(C L ) which does not exceed approximately 20 pF when used
at the highest operating frequencies listed in the Loop
Specifications table. Assuming R1 = 0
capacitance (C L ) presented across the crystal can be
estimated to be:
where
portion or all of C1 variable. The crystal and associated
components must be located as close as possible to the
REF in and REF out pins to minimize distortion, stray
capacitance, stray inductance, and startup stabilization time.
Circuit stray capacitance can also be handled by adding the
appropriate stray value to the values for C in and C out . For this
approach, the term C stray becomes 0 in the above expression
for C L .
crystal, R e , in Figure 20. The maximum drive level specified
by the crystal manufacturer represents the maximum stress
that the crystal can withstand without damage or excessive
C L = C in C out
C1 and C2 = external capacitors (see Figure 18)
MOTOROLA WIRELESS SEMICONDUCTOR
SOLUTIONS – RF AND IF DEVICE DATA
The following options may be considered to provide a
Commercially available temperature–compensated
For additional information about TCXOs and data clock
The user may design an off–chip crystal oscillator using
The on–chip amplifier (a digital inverter) along with an
The crystal should be specified for a loading capacitance
The oscillator can be “trimmed” on–frequency by making a
Power is dissipated in the effective series resistance of the
C stray = the total equivalent external circuit stray
C in + C out
C out = 6 pF (see Figure 19)
C in = 5 pF (see Figure 19)
C a = 1 pF (see Figure 19)
capacitance appearing across the crystal
terminals
+ C a + C stray + C1 C2
Freescale Semiconductor, Inc.
C1 + C2
For More Information On This Product,
, the shunt load
DESIGN CONSIDERATIONS
Go to: www.freescale.com
MC145193
shift in operating frequency. R1 in Figure 18 limits the drive
level. The use of R1 is not necessary in most cases.
cause the crystal to be overdriven, monitor the output
frequency (f R ) at Output A as a function of supply voltage.
(REF out is not used because loading impacts the oscillator.)
The frequency should increase very slightly as the dc supply
voltage is increased. An overdriven crystal decreases in
frequency or becomes unstable with an increase in supply
voltage. The operating supply voltage must be reduced or R1
must be increased in value if the overdriven condition exists.
The user should note that the oscillator start–up time is
proportional to the value of R1.
CMOS inverters, many crystal manufacturers have
developed expertise in CMOS oscillator design with crystals.
Discussions with such manufacturers can prove very helpful
(see Table 6).
REF in
1
To verify that the maximum dc supply voltage does not
Through the process of supplying crystals for use with
NOTE: Values are supplied by crystal manufacturer
* May be needed in certain cases. See text.
Figure 18. Pierce Crystal Oscillator Circuit
Figure 19. Parasitic Capacitances of the
Figure 20. Equivalent Crystal Networks
(parallel resonant crystal).
C1
2
C in
REF in
Amplifier and C stray
1
R f
1
C stray
C2
R1*
Frequency Synthesizer
C a
R S
R e
REF out
C out
X e
C O
L S
2
C S
REF out
17
2