ICE2A280ZXK Infineon Technologies, ICE2A280ZXK Datasheet - Page 11

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ICE2A280ZXK

Manufacturer Part Number
ICE2A280ZXK
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of ICE2A280ZXK

Number Of Pwm Outputs
1
On/off Pin
No
Adjustable Output
No
Topology
Flyback
Switching Freq
107KHz
Duty Cycle
77%
Operating Supply Voltage (max)
21V
Output Current
2000A
Output Voltage
800V
Synchronous Pin
No
Rise Time
30ns
Fall Time
30ns
Operating Temperature Classification
Automotive
Mounting
Through Hole
Pin Count
7
Package Type
PDIP
Lead Free Status / Rohs Status
Compliant
secondary output voltage is insensitive on line
variations.
waveform slope which controls the duty cycle.
The external R
the maximum source current of the integrated
CoolMOS™.
Figure 9
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T
low pass filter composed of R
Figure 10). Every time the oscillator shuts down for
max. duty cycle limitation the switch T2 is closed by
V
opened so that the voltage ramp can start.
In case of light load the amplified current ramp is to
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the Comparator C5, the Gate Driver is
switched-off until the voltage ramp exceeds 0.3V. It
allows the duty cycle to be reduced continuously till 0%
by decreasing V
Version 2.6
OSC
Oscillator
FB
. When the oscillator triggers the Gate Driver T2 is
Voltage Ramp
Soft-Start Comparator
V
OSC
Improved Current Mode
2
T
Line
, the voltage source V
2
Sense
C
FB
1
0.3V
below that threshold.
variation
allows an individual adjustment of
10kΩ
R
20pF
1
PWM Comparator
C5
changes
1
0.8V
and C
V
1
Gate Driver
PWM-Latch
1
and the 1st order
1
PWM OP
(see Figure 9,
x3.65
the
current
11
Figure 10
3.2.1
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor
R
source current into a sense voltage. The sense voltage
is amplified with a gain of 3.65 by PWM OP. The output
of the PWM-OP is connected to the voltage source V1.
The voltage ramp with the superimposed amplified
current signal is fed into the positive inputs of the PWM-
Comparator, C5 and the Soft-Start-Comparator.
3.2.2
The PWM-Comparator compares the sensed current
signal of the integrated CoolMOS
signal V
external
combination with the internal pull-up resistor R
provides the load information of the feedback circuitry.
When the amplified current signal of the integrated
CoolMOS™ exceeds the signal V
Comparator switches off the Gate Driver.
Sense
0.8V
0.3V
Voltage Ramp
Gate Driver
FB
V
connected to pin Isense. R
OSC
FB
optocoupler
PWM-OP
PWM-Comparator
Light Load Conditions
(see Figure 11). V
Duty Cycle
max.
Functional Description
or
external
FB
CoolSET™-F2
TM
Sense
is created by an
with the feedback
FB
25 Dec 2006
transistor
converts the
the PWM-
FB
t
and
t
t
in

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