MAX503CAG+T Maxim Integrated Products, MAX503CAG+T Datasheet - Page 9

• Manufacturer Part Number: MAX503CAG+T
• Description: IC DAC 10BIT 5V LP 24-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX503CAG+T

• Settling Time: 25µs
• Number Of Bits: 10
• Data Interface: Parallel
• Number Of Converters: 1
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 640mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 2. Reference Noise vs. Frequency
The output amplifier uses a folded cascode input stage
and a type AB output stage. Large output devices with
low series resistance allow the output to swing to
ground in single-supply operation. The output buffer is
unity-gain stable. Input offset voltage and supply cur-
rent are laser trimmed. Settling time is 25µs to 0.01% of
final value. The output is short-circuit protected and
can drive a 2kΩ load with more than 100pF of load
capacitance. The op amp may be placed in unity-gain
(G = 1), in a gain of two (G = 2), or in a bipolar-output
mode by using the ROFS and RFB pins. These pins are
used to define a DAC output voltage range of 0V to
+2.048V, 0V to +4.096V or ±2.048V, by connecting
ROFS to VOUT, GND, or REFIN. RFB is always con-
nected to VOUT. Table 1 summarizes ROFS usage.
Table 1. ROFS Usage
Note: Assumes RFB = VOUT and REFIN = REFOUT = 2.048V
CONNECTED TO:
AGND
REFIN
ROFS
VOUT
300
250
200
150
100
50
0
0.1
C
REFOUT
SINGLE POLE ROLLOFF
REFOUT
_______________________________________________________________________________________
1
-2.048V to +2.048V
TEK 7A22
FREQUENCY (kHz)
R
C
DAC OUTPUT
S
S
0V to 4.096V
0V to 2.048V
C
REFOUT
RANGE
10
= 3.3 F
C
REFOUT
100
TOTAL
REFERENCE
NOISE
= 47 F
Output Buffer
1000
5V, Low-Power, Parallel-Input,
OP-AMP
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Bipolar
G = 1
G = 2
GAIN
Voltage-Output, 10-Bit DAC
An external reference in the range (V
(V
ply, unity-gain operation. In single-supply, unity-gain
operation, the reference must be positive and may not
exceed (V
the DAC’s full-scale output.
If an upgrade to the internal reference is required, the
2.5V MAX873A is ideal: ±15mV initial accuracy,
7ppm/°C (max) temperature coefficient.
An internal power-on reset (POR) circuit forces the
DAC register to reset to all 0s when V
The POR pulse is typically 1.3µs; however, it may take
2ms for the internal reference to charge its large filter
capacitor and settle to its trimmed value.
In addition to POR, a clear (CLR) pin, when held low,
sets the DAC register to all 0s. CLR operates asynchro-
nously and independently from chip select (CS). With
the DAC input at all 0s, the op-amp output is at zero for
unity-gain and G = 2 configurations, but it is at -V
for the bipolar configuration.
The MAX503 is designed for low power consumption.
Understanding the circuit allows power consumption
management for maximum efficiency. In single-supply
mode (V
rent is typically only 160µA, including the reference, op
amp, and DAC. This low current occurs when the
power-on reset circuit clears the DAC to all 0s and
forces the op-amp output to zero (unipolar mode only).
See the Supply Current vs. REFIN graph in the Typical
Operating Characteristics . Under this condition, there
is no internal load on the reference (DAC = all 0s,
REFIN is open circuit) and the op amp operates at its
minimum quiescent current. The CLR signal resets the
MAX503 to these same conditions and can be used to
control a power-saving mode when the DAC is not
being used by the system.
DD
- 2V) may be used with the MAX503 in dual-sup-
DD
DD
= +5V, V
- 2V). The reference voltage determines
SS
= GND) the initial supply cur-
External Reference
Power-On Reset
Shutdown Mode
DD
is first applied.
SS
+ 2V) to
REF
9