EPM7512BBC256-10 Altera, EPM7512BBC256-10 Datasheet - Page 28

IC MAX 7000 CPLD 512 256-BGA

EPM7512BBC256-10

Manufacturer Part Number
EPM7512BBC256-10
Description
IC MAX 7000 CPLD 512 256-BGA
Manufacturer
Altera
Series
MAX® 7000Br
Datasheet

Specifications of EPM7512BBC256-10

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
2.375 V ~ 2.625 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
10000
Number Of I /o
212
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Voltage
2.5V
Memory Type
EEPROM
Number Of Logic Elements/cells
32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

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Quantity
Price
Part Number:
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Part Number:
EPM7512BBC256-10
Manufacturer:
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Quantity:
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MAX 7000B Programmable Logic Device Data Sheet
28
Operating
Conditions
V
V
V
I
T
T
T
Symbol
OUT
Table 14. MAX 7000B Device Absolute Maximum Ratings
STG
A
J
CCINT
CCIO
I
Supply voltage
Supply voltage
DC input voltage
DC output current, per pin
Storage temperature
Ambient temperature
Junction temperature
Parameter
Figure 11. MAX 7000B AC Test Conditions
Tables 14
recommended operating conditions, operating conditions, and
capacitance for MAX 7000B devices.
Power supply transients can affect AC
measurements. Simultaneous transitions
of multiple outputs should be avoided for
accurate measurement. Threshold tests
must not be performed under AC
conditions. Large-amplitude, fast-ground-
current transients normally occur as the
device outputs discharge the load
capacitances. When these transients flow
through the parasitic inductance between
the device ground pin and the test system
ground, significant reductions in
observable noise immunity can result.
Numbers in brackets are for 2.5-V
outputs. Numbers without brackets are for
3.3-V outputs. Switches S1 and S2 are
open for all tests except output disable
timing parameters.
through
(2)
No bias
Under bias
Under bias
17
provide information on absolute maximum ratings,
Conditions
Note (1)
Device input
rise and fall
times < 2 ns
Device
Output
[521 Ω]
[481 Ω]
600 Ω
720 Ω
–0.5
–0.5
–2.0
Min
–33
–65
–65
–65
V
CCIO
S1
S2
Altera Corporation
Max
150
135
135
3.6
3.6
4.6
50
C1 (includes jig
capacitance)
To Test
System
Unit
mA
° C
° C
° C
V
V
V

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