EPM7256AEFI256-7 Altera, EPM7256AEFI256-7 Datasheet - Page 24

• Manufacturer Part Number: EPM7256AEFI256-7
• Description: IC MAX 7000 CPLD 256 256-FBGA
• Manufacturer: Altera
• Series: MAX® 7000Ar

Specifications of EPM7256AEFI256-7

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 16
• Number Of Macrocells: 256
• Number Of Gates: 5000
• Number Of I /o: 164
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-FBGA
• Voltage: 3.3V
• Memory Type: EEPROM
• Number Of Logic Elements/cells: 16
• Family Name: MAX 7000A
• # Macrocells: 256
• Number Of Usable Gates: 5000
• Frequency (max): 166.67MHz
• Propagation Delay Time: 7.5ns
• Number Of Logic Blocks/elements: 16
• # I/os (max): 164
• Operating Supply Voltage (typ): 3.3V
• In System Programmable: Yes
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-2348

MAX 7000A Programmable Logic Device Data Sheet
Programmable
Speed/Power
Control
Output
Configuration
24
MAX 7000A devices offer a power-saving mode that supports low-power
operation across user-defined signal paths or the entire device. This
feature allows total power dissipation to be reduced by 50% or more
because most logic applications require only a small fraction of all gates to
operate at maximum frequency.
The designer can program each individual macrocell in a MAX 7000A
device for either high-speed (i.e., with the Turbo Bit
or low-power operation (i.e., with the Turbo Bit option turned off). As a
result, speed-critical paths in the design can run at high speed, while the
remaining paths can operate at reduced power. Macrocells that run at low
power incur a nominal timing delay adder (t
t
MAX 7000A device outputs can be programmed to meet a variety of
system-level requirements.
MultiVolt I/O Interface
The MAX 7000A device architecture supports the MultiVolt I/O interface
feature, which allows MAX 7000A devices to connect to systems with
differing supply voltages. MAX 7000A devices in all packages can be set
for 2.5-V, 3.3-V, or 5.0-V I/O pin operation. These devices have one set of
VCC pins for internal operation and input buffers (VCCINT), and another
set for I/O output drivers (VCCIO).
The VCCIO pins can be connected to either a 3.3-V or 2.5-V power supply,
depending on the output requirements. When the VCCIO pins are
connected to a 2.5-V power supply, the output levels are compatible with
2.5-V systems. When the VCCIO pins are connected to a 3.3-V power
supply, the output high is at 3.3 V and is therefore compatible with 3.3-V
or 5.0-V systems. Devices operating with V
incur a slightly greater timing delay of t
always be driven by 2.5-V, 3.3-V, or 5.0-V signals.
Table 12
EN
Table 12. MAX 7000A MultiVolt I/O Support
, t
V
CCIO
SEXP
2.5
3.3
Voltage
describes the MAX 7000A MultiVolt I/O support.
, t
ACL
, and t
CPPW
2.5
v
v
Input Signal (V)
parameters.
3.3
v
v
OD2
5.0
v
v
CCIO
instead of t
LPA
) for the t
levels lower than 3.0 V
2.5
v
Output Signal (V)
TM
Altera Corporation
option turned on)
OD1
LAD
3.3
v
. Inputs can
, t
LAC
, t
5.0
v
IC
,