DSPB56720CAG Freescale Semiconductor, DSPB56720CAG Datasheet - Page 35

• Manufacturer Part Number: DSPB56720CAG
• Description: DSP 24BIT AUD 200MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56720CAG

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 200MHz
• Non-volatile Memory: External
• On-chip Ram: 744kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.00V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 200MHz
• Mips: 200
• Device Input Clock Speed: 200MHz
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 1/3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2.17
Table 14
2.18
The HDI24 module is only on the DSP56721 device; the DSP56720 device does not have a HDI24 module. Also, only 16 bits
of the HDI24 interface are pinned out on the DSP56721 device.
show the timing diagrams.
Freescale Semiconductor
No.
317
318
319
No.
120
121
Read data strobe assertion width 3
HACK read assertion width
Read data strobe deassertion width 3
HACK read deassertion width
Read data strobe deassertion width 3 after “Last Data Register” reads 4,5 ,
or between two consecutive CVR, ICR, or ISR reads 6
HACK deassertion width after “Last Data Register” reads
lists the watchdog timer timing.
Watchdog Timer Timing
Host Data Interface (HDI24) Timing
Delay from time-out to fall of WDT, WDT_1
Delay from timer clear to rise of WDT, WDT_1
(Output)
(Output)
(Output)
(Input)
(Input)
TMS
TDO
TDO
TDO
TCK
TDI
Symphony
VIL
Table 14. Watchdog Timer Timing Parameters
Characteristics
Characteristics
™
Figure 28. Test Access Port Timing Diagram
DSP56720/DSP56721 Multi-Core Audio Processors, Rev. 5
Table 15. HDI24 Timing Parameters
119
118
118
2
Table 15
4,5
lists HDI24 timing and
116
Output Data Valid
Output Data Valid
Input Data Valid
Expression
2 × T c
2 × Tc
Expression
2 × T
T
C
VIH
—
+ 9.9
C
117
+ 6.6
10.0
10.0
Min
Figure 29
14.9
16.6
Min
9.9
200 MHz
Max
—
—
through
Max
—
—
—
Unit
ns
ns
Figure 35
Unit
ns
ns
ns
35