KMSC8126VT8000 Freescale Semiconductor, KMSC8126VT8000 Datasheet - Page 7

• Manufacturer Part Number: KMSC8126VT8000
• Description: DSP 16BIT QUAD 500MHZ 431-FCPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC81xx StarCorer
• Type: SC140 Corer

Specifications of KMSC8126VT8000

• Interface: DSI, Ethernet, RS-232
• Clock Rate: 500MHz
• Non-volatile Memory: External
• On-chip Ram: 1.436MB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: 0°C ~ 90°C
• Mounting Type: Surface Mount
• Package / Case: 431-FCPBGA
• Device Core Size: 16b
• Clock Freq (max): 500MHz
• Mips: 500
• Device Input Clock Speed: 500MHz
• Operating Supply Voltage (typ): 1.2/3.3V
• Operating Temp Range: 0C to 90C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 431
• Package Type: FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
General-Purpose
Global Interrupt
Controller (GIC)
I/O (GPIO) Port
Semaphores
I
2
C Software
Hardware
Feature
Module
Feature
Timers
UART
• Two signals for transmit data and receive data.
• No clock, asynchronous mode.
• Can be serviced either by the SC140 DSP cores or an external host on the system bus or the DSI.
• Full-duplex operation.
• Standard mark/space non-return-to-zero (NRZ) format.
• 13-bit baud rate selection.
• Programmable 8-bit or 9-bit data format.
• Separately enabled transmitter and receiver.
• Programmable transmitter output polarity.
• Two receiver wake-up methods:
• Separate receiver and transmitter interrupt requests.
• Eight flags, the first five can generate interrupt request:
• Receiver framing error detection.
• Hardware parity checking.
• 1/16 bit-time noise detection.
• Maximum bit rate 6.25 Mbps.
• Single-wire and loop operations.
• 32 bidirectional signal lines that either serve the peripherals or act as programmable I/O ports.
• Each port can be programmed separately to serve up to two dedicated peripherals, and each port
• Booting from a serial EEPROM.
• Uses GPIO timing.
Two modules of 16 timers each.
• Cyclic or one-shot.
• Input clock polarity control.
• Interrupt request when counting reaches a programmed threshold.
• Pulse or level interrupts.
• Dynamically updated programmed threshold.
• Read counter any time.
Watchdog mode for the timers that connect to the device.
Eight coded hardware semaphores, locked by simple write access without need for read-modify-write
mechanism.
• Consolidation of chip maskable interrupt and non-maskable interrupt sources and routing to
• Generation of 32 virtual interrupts (eight to each SC140 core) by a simple write access.
• Generation of virtual
— Idle line wake-up.
— Address mark wake-up.
— Transmitter empty.
— Transmission complete.
— Receiver full.
— Idle receiver input.
— Receiver overrun.
— Noise error.
— Framing error.
— Parity error.
supports open-drain output mode.
INT_OUT
,
NMI_OUT
Table 5. Serial Interfaces (Continued)
Table 6. Miscellaneous Modules
, and to the cores.
MSC8126 Product Brief, Rev. 7
NMI
(one to each SC140 core) by a simple write access.
Description
Description
Features
7